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8-8
MPC7400 RISC Microprocessor Users Manual
60x Bus Signal ConTguration
8.2.2 Address Bus Arbitration Signals
The address arbitration signals are input and output signals the MPC7400 uses to request
the address bus, recognize when the request is granted, and indicate to other devices when
mastership is granted. For a detailed description of how these signals interact, see
Section 9.3.1, òAddress Bus Arbitration.ó
8.2.2.1 Bus Request (BR)Output
Following are the state meaning and timing comments for the BR output signal.
State Meaning
AssertedIndicates that the MPC7400 is requesting mastership of
the address bus. Note that BR may be asserted for one or more
cycles, and then negated due to an internal cancellation of the bus
request. See Section 9.3.1, òAddress Bus Arbitration,ó for more
information.
NegatedIndicates that the MPC7400 is not requesting the address
bus. The MPC7400 may have no bus operation pending, the address
bus may be parked, or the ARTRY input was asserted on the previous
bus clock cycle.
Timing Comments
AssertionOccurs when the MPC7400 is not parked and a bus
transaction is needed.
NegationOccurs for at least one bus clock cycle after an accepted,
qualiTed bus grant (see BG), even if another transaction is pending.
It is also negated for at least one bus clock cycle when the assertion
of ARTRY is detected on the bus.
High ImpedanceOccurs during a hard reset or checkstop
condition.
8.2.2.2 Bus Grant (BG)Input
Following are the state meaning and timing comments for the BG input signal.
State Meaning
AssertedIndicates that the MPC7400 may, with proper
qualiTcation, assume mastership of the address bus. The conditions
for a qualiTed bus grant are described in Section 9.3.1, òAddress Bus
Arbitration.ó
Negated Indicates that the MPC7400 is not the next potential
address bus master.
Timing Comments
AssertionMay occur at any time to indicate the MPC7400 can use
the address bus. In 60x bus mode, the MPC7400 does not accept a
BG in the cycles between the assertion of any TS and AACK.
NegationMay occur at any time to indicate the MPC7400 cannot
use the bus. The MPC7400 may still assume bus mastership on the