Chapter 2. Programming Model
2-25
The MPC7400 Processor Register Set
Examples of valid THRM1/THRM2 bit settings are shown in Table 2-14.
Table 2-14. Valid THRM1/THRM2 States
The THRM3 register, shown in Figure 2-13, is used to enable the thermal assist unit and to
control the comparator output sample time. The thermal assist logic manages the thermal
management interrupt generation and time-multiplexed comparisons in dual-threshold
mode as well as other control functions.
Figure 2-13. Thermal Management Register 3 (THRM3)
The bits in THRM3 are described in Table 2-15.
TIN
1
1
TIN and TIV are read-only status bits.
TIV
1
TID
TIE
V
Description
x
x
x
x
0
Invalid entry. The threshold in the SPR is not used for comparison.
x
x
x
0
1
Disable thermal management interrupt assertion.
x
x
0
x
1
Set TIN and assert thermal management interrupt if TIE = 1 and the junction
temperature exceeds the threshold.
x
x
1
x
1
Set TIN and assert thermal management interrupt if TIE = 1 and the junction
temperature is less than the threshold.
x
0
x
x
1
The state of the TIN bit is not valid.
0
1
0
x
1
The junction temperature is less than the threshold and as a result the thermal
management interrupt is not generated for TIE = 1.
1
1
0
x
1
The junction temperature is greater than the threshold and as a result the
thermal management interrupt is generated if TIE = 1.
0
1
1
x
1
The junction temperature is greater than the threshold and as a result the
thermal management interrupt is not generated for TIE = 1.
1
1
1
x
1
The junction temperature is less than the threshold and as a result the thermal
management interrupt is generated if TIE = 1.
Table 2-15. THRM3 Bit Settings
Bits
Name
Description
0D17
Reserved for future use. System software should clear these bits when writing to the THRM3.
18D30
SITV
Sample interval timer value. Number of elapsed processor clock cycles before a junction
temperature vs. threshold comparison result is sampled for TIN bit setting and interrupt
generation. This is necessary due to the thermal sensor, DAC, and the analog comparator settling
time being greater than the processor cycle time. The value should be conTgured to allow a
sampling interval of 20 microseconds.
31
E
Enables the thermal sensor compare operation if either THRM1[V] or THRM2[V] is set.
0
17 18
30 31
Reserved
E
Sampled Interval Timer Value
ê0 0 0 0 êê0 0 0 0 êê0 0 0 0 êê0 0 0 0 êê0 0 êê