Tables
xxix
TABLES
Table
Number
Title
Page
Number
1-1
PowerPC Architecture-Defined Registers on the MPC7400
(Excluding SPRs)........................................................................................................1-27
PowerPC Architecture-Defined SPRs Implemented by the MPC7400......................1-28
AltiVec-Specific Registers.........................................................................................1-28
MPC7400-Specific Registers.....................................................................................1-29
MPC7400 Microprocessor Exception Classifications...............................................1-35
Exceptions and Conditions ........................................................................................1-36
Differences between the MPC7400 and the MPC750...............................................1-44
Additional MSR Bits ...................................................................................................2-6
Additional SRR1 Bits ..................................................................................................2-8
Instruction Address Breakpoint Register Field Descriptions.....................................2-11
HID0 Field Descriptions............................................................................................2-11
HID0[BCLK] and HID0[ECLK] CLK_OUT Configuration .....................................2-15
HID1 Field Descriptions............................................................................................2-15
MMCR0 Field Descriptions.......................................................................................2-16
MMCR1 Field Descriptions.......................................................................................2-19
MMCR2 Field Descriptions.......................................................................................2-20
BAMR Field Descriptions.........................................................................................2-20
PMCn Field Descriptions...........................................................................................2-21
ICTC Field Descriptions............................................................................................2-23
THRM1DTHRM2 Bit Settings...................................................................................2-24
Valid THRM1/THRM2 States...................................................................................2-25
THRM3 Bit Settings..................................................................................................2-25
MSSCR0 Field Descriptions......................................................................................2-27
L2CR Field Descriptions...........................................................................................2-28
Settings Caused by Hard Reset (Used at Power-On).................................................2-32
Integer Arithmetic Instructions..................................................................................2-42
Integer Compare Instructions......................................................................................2-44
Integer Logical Instructions.......................................................................................2-44
Integer Rotate Instructions.........................................................................................2-45
Integer Shift Instructions............................................................................................2-46
Floating-Point Arithmetic Instructions......................................................................2-46
Floating-Point Multiply-Add Instructions.................................................................2-47
Floating-Point Rounding and Conversion Instructions..............................................2-47
Floating-Point Compare Instructions.........................................................................2-48
Floating-Point Status and Control Register Instructions ...........................................2-48
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2-1
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2-28