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MPC7400 RISC Microprocessor Users Manual
Instruction Set Summary
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Memory control instructionsThese instructions provide control of caches, TLBs,
and segment registers. For more information, see Section 2.3.5.3, òMemory Control
InstructionsVEA,ó and Section 2.3.6.3, òMemory Control InstructionsOEA.ó
External control instructionsThese include instructions for use with special
input/output devices. For more information, see Section 2.3.5.4, òOptional External
Control Instructions.ó
AltiVec instructionsDAltiVec technology does not have optional instructions
deTned, so all instructions listed in
The AltiVec Technology Programming
Environments Manual
are implemented for MPC7400. Instructions that are
implementation speciTc are described in Section 2.6.2, òAltiVec Instructions with
SpeciTc Implementations for the MPC7400.ó
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Note that this grouping of instructions does not necessarily indicate the execution unit that
processes a particular instruction or group of instructions. This information, which is useful
for scheduling instructions most effectively, is provided in Chapter 6, òInstruction Timing.ó
Integer instructions operate on word operands. Floating-point instructions operate on
single-precision and double-precision oating-point operands. AltiVec instructions operate
on byte, half-word, word, and quad-word operands. The PowerPC architecture uses
instructions that are four bytes long and word-aligned. It provides for byte, half-word, and
word operand loads and stores between memory and a set of 32 general-purpose registers
(GPRs). It provides for word and double-word operand loads and stores between memory
and a set of 32 oating-point registers (FPRs). It also provides for byte, half-word, word,
and quad-word operand loads and stores between memory and a set of 32 vector registers
(VRs).
Arithmetic and logical instructions do not read or modify memory. To use the contents of a
memory location in a computation and then modify the same or another memory location,
the memory contents must be loaded into a register, modiTed, and then written to the target
location using load and store instructions.
The description of each instruction includes the mnemonic and a formatted list of operands.
To simplify assembly language programming, a set of simpliTed mnemonics and symbols
is provided for some of the frequently-used instructions; see Appendix F, òSimplified
Mnemonics,ó in
The Programming Environments Manual
for a complete list of simpliTed
mnemonics. Note that the architecture speciTcation refers to simpliTed mnemonics as
extended mnemonics. Programs written to be portable across the various assemblers for the
PowerPC architecture should not assume the existence of mnemonics not described in that
document.