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MPC7400 RISC Microprocessor Users Manual
CONTENTS
Paragraph
Number
Title
Page
Number
9.3.3.2
9.3.3.3
9.4
9.4.1
9.4.1.1
9.4.1.2
9.4.1.3
9.4.2
9.4.3
9.4.3.1
9.4.3.2
9.4.3.3
9.4.4
9.5
9.6
9.6.1
9.6.1.1
9.6.1.1.1
9.6.1.1.2
9.6.1.2
9.6.1.2.1
9.6.1.2.2
9.6.1.2.3
9.6.1.2.4
9.6.1.3
9.6.1.3.1
9.6.1.3.2
9.6.1.3.3
9.6.1.4
9.6.1.4.1
9.6.1.4.2
9.6.1.4.3
9.6.1.4.4
9.6.2
9.6.2.1
9.6.2.1.1
9.6.2.1.2
Snoop Copyback and Window of Opportunity ........................................ 9-22
Snoop Response and SHD Signal............................................................. 9-24
60x Data Bus Tenure ........................................................................................ 9-24
Data Bus Arbitration..................................................................................... 9-24
Qualified Data Bus Grant in 60x Bus Mode............................................. 9-24
Using the DBB Signal .............................................................................. 9-25
Data Bus Write Only (
DBWO
) and Data Bus Arbitration....................... 9-25
Data Transfer Signals and Protocol.............................................................. 9-26
Data Transfer Termination............................................................................ 9-27
Normal Single-Beat Termination ............................................................. 9-27
Data Transfer Termination Due to a Bus Error........................................ 9-29
No-
DRTRY
Mode.................................................................................... 9-30
Using Data Bus Write Only (
DBWO
).......................................................... 9-30
60x Bus Timing Examples................................................................................ 9-31
MPX Bus Protocol............................................................................................ 9-37
Address Tenure in MPX Bus Mode.............................................................. 9-38
Address Arbitration Phase........................................................................ 9-38
Qualified Bus Grant in MPX Bus Mode .............................................. 9-39
MPX Bus Mode Address Bus Parking................................................. 9-40
Address Transfer in MPX Bus Mode ....................................................... 9-41
Address Bus Driven Mode ................................................................... 9-42
Address Bus Streaming ........................................................................ 9-42
Address Bus Parity ............................................................................... 9-42
Address Pipelining................................................................................ 9-42
Transfer Attributes in MPX Bus Mode .................................................... 9-42
Transfer Type 0D4 (TT[0:4]) in MPX Bus Mode................................. 9-43
Transfer Size......................................................................................... 9-43
Aligned and Misaligned Transfers........................................................ 9-44
Address Termination Phase in MPX Bus Mode....................................... 9-44
Address Retry (
ARTRY
) in MPX Bus Mode....................................... 9-45
Shared (
SHD0
,
SHD1
) Signals for MPX Bus Mode........................... 9-47
Hit (
HIT
) Signal and Data Intervention............................................... 9-48
HIT
Signal Timing and Data Snarfing................................................. 9-49
Data Tenure in MPX Bus Mode................................................................... 9-50
Data Bus Arbitration Phase in MPX Bus Mode....................................... 9-50
Qualified Data Bus Grant in MPX Bus Mode...................................... 9-50
Data Streaming Constraints for Data Bus Arbitration in
MPX Bus Mode.................................................................................... 9-51
Data Bus Transfers ................................................................................... 9-51
Earliest Transfer of Data....................................................................... 9-52
Data InterventionMPX Bus Mode.................................................... 9-52
Data-Only Transaction Protocol........................................................... 9-53
DRDY Timing (Data-Only Transactions)............................................ 9-54
9.6.2.2
9.6.2.2.1
9.6.2.2.2
9.6.2.2.3
9.6.2.2.4