2-48
MPC7400 RISC Microprocessor Users Manual
Instruction Set Summary
2.3.4.2.4 Floating-Point Compare Instructions
Floating-point compare instructions compare the contents of two oating-point registers.
The comparison ignores the sign of zero (that is +0 = D0). The oating-point compare
instructions are summarized in Table 2-27.
Table 2-27. Floating-Point Compare Instructions
The PowerPC architecture allows an
fcmpu
or
fcmpo
instruction with the Rc bit set to
produce a boundedly-undeTned result, which can include an illegal instruction program
exception. In the MPC7400,
crf
D should be treated as undeTned
2.3.4.2.5 Floating-Point Status and Control Register Instructions
Every FPSCR instruction appears to synchronize the effects of all oating-point
instructions executed by a given processor. Executing an FPSCR instruction ensures that all
oating-point instructions previously initiated by the given processor appear to have
completed before the FPSCR instruction is initiated and that no subsequent oating-point
instructions appear to be initiated by the given processor until the FPSCR instruction has
completed. The FPSCR instructions are summarized in Table 2-28.
Table 2-28. Floating-Point Status and Control Register Instructions
Implementation Note
The PowerPC architecture states that in some implementations,
the Move to FPSCR Fields (
mtfsf
) instruction can perform more slowly when only some
of the Telds are updated as opposed to all of the Telds. In the MPC7400, there is no
degradation of performance.
2.3.4.2.6 Floating-Point Move Instructions
Floating-point move instructions copy data from one FPR to another. The oating-point
move instructions do not modify the FPSCR. The CR update option in these instructions
controls the placing of result status into CR1. Table 2-29 summarizes the oating-point
move instructions.
Name
Mnemonic
Syntax
Floating Compare Unordered
fcmpu
crf
D
,fr
A
,fr
B
Floating Compare Ordered
fcmpo
crf
D
,fr
A
,fr
B
Name
Mnemonic
Syntax
Move from FPSCR
mffs
(
mffs.
)
fr
D
Move to Condition Register
from FPSCR
mcrfs
crf
D
,crf
S
Move to FPSCR Field Immediate
mtfsT
(
mtfsT.
)
crf
D
,
IMM
Move to FPSCR Fields
mtfsf
(
mtfsf.
)
FM
,fr
B
Move to FPSCR Bit 0
mtfsb0
(
mtfsb0.
)
crb
D
Move to FPSCR Bit 1
mtfsb1
(
mtfsb1.
)
crb
D