
3-8
MPC106 PCIB/MC User's Manual
MOTOROLA
Table 3-4. Address Map B—Processor View
60x Processor Address Range
PCI Address Range
Definition
Hex
Decimal
00000000
0009FFFF
0
640K – 1
No PCI cycle
System memory space
000A0000
000BFFFF
640K
768K – 1
000A0000–000BFFFF
Compatibility hole
1
000C0000
3FFFFFFF
768K
1G – 1
No PCI cycle
System memory space
40000000
7FFFFFFF
1G
2G – 1
No PCI cycle
Reserved
2
80000000
FCFFFFFF
2G
4G – 48M – 1
80000000–FCFFFFFF
PCI memory space
FD000000
FDFFFFFF
4G – 48M
4G – 32M – 1
00000000–00FFFFFF
PCI/ISA memory space
3
FE000000
FE7FFFFF
4G – 32M
4G – 24M – 1
00000000–0000FFFF
PCI/ISA I/O space
(64 Kbytes or 8 Mbytes)
4
FE800000
FEBFFFFF
4G – 24M
4G – 20M – 1
00800000–00BFFFFF
PCI I/O space
5
FEC00000
FEDFFFFF
4G – 20M
4G – 18M – 1
CONFIG_ADDR
PCI configuration
address register
6
FEE00000
FEEFFFFF
4G – 18M
4G – 17M – 1
CONFIG_DATA
PCI configuration data
register
FEF00000
FEFFFFFF
4G – 17M
4G – 16M – 1
FEF00000–FEFFFFFF
PCI interrupt
acknowledge
8
FF000000
FF7FFFFF
4G – 16M
4G – 8M – 1
FF000000–FF7FFFFF
64-bit system ROM
space
FF800000
FFFFFFFF
4G – 8M
4G – 1
FF800000–FFFFFFFF
8- or 64-bit system ROM
space
Table 3-5. Address Map B—PCI Memory Master View
PCI Memory Transaction Address Range
60x Address Range
Definition
Hex
Decimal
00000000
0009FFFF
0
640K – 1
00000000–0009FFFF
System memory space
000A0000
000FFFFF
640K
1M – 1
000A0000–000FFFFF
Compatibility hole
1
00100000
3FFFFFFF
1M
1G – 1
00100000–3FFFFFFF
System memory space
40000000
7FFFFFFF
1G
2G – 1
40000000–7FFFFFFF
Reserved
2
80000000
FCFFFFFF
2G
4G – 48M –1
No system memory cycle
PCI memory space
FD000000
FDFFFFFF
4G – 48M
4G – 32M –1
00000000–00FFFFFF
System memory space
10
FE000000
FEFFFFFF
4G – 32M
4G – 16M – 1
No system memory cycle
Reserved
FF000000
FF7FFFFF
4G – 16M
4G – 8M – 1
FF000000–FF7FFFFF
64-bit system ROM
space