MOTOROLA
Chapter 2. Signal Descriptions
2-41
Negation—May occur at any time after the minimum hard reset
pulse width has been met.
2.2.6.3 Nonmaskable Interrupt (NMI)—Input
The nonmaskable interrupt (NMI) signal is an input on the MPC106. Following are the state
meaning and timing comments for the NMI input signal.
State Meaning
Asserted—Indicates that the MPC106 should signal a machine
check interrupt to the 60x processor.
Negated—No special meaning.
Timing Comments
Assertion—NMI may occur at any time, asynchronous to SYSCLK.
Negation—Should not occur until after the interrupt is taken.
2.2.6.4 Quiesce Acknowledge (QACK)—Output
The quiesce acknowledge (QACK) signal is an output on the MPC106. See Section A.1.1,
“MPC106 Power Mode Transition,” for more information about the power management
signals. Following are the state meaning and timing comments for the QACK output signal.
State Meaning
Asserted—Indicates that the MPC106 is in a low-power state. All
bus activity that requires snooping has terminated, and the 60x
processor may enter a low-power state.
Negated—Indicates that the 60x processor should not enter a low-
power state. The MPC106 is in full-on state with normal bus activity.
Timing Comments
Assertion—The MPC106 can assert QACK at any time,
synchronous to the 60x bus clock when QREQ is asserted.
Negation—The MPC106 can negate QACK any time, synchronous
to the 60x bus clock.
2.2.6.5 Quiesce Request (QREQ)—Input
The quiesce request (QREQ) signal is an input on the MPC106. See Section A.1.1,
“MPC106 Power Mode Transition,” for more information about the power management
signals. Following are the state meaning and timing comments for the QREQ input signal.
State Meaning
Asserted—Indicates that a 60x processor is requesting that all bus
activity involving snoop operations pause or terminate so that the
60x processor may enter a low-power state.
Negated—Indicates that a 60x processor is in the full-on state.
Timing Comments
Assertion/Negation—A 60x processor can assert QREQ at any time,
asynchronous to the 60x bus clock. The MPC106 synchronizes
QREQ internally.