MOTOROLA
Chapter 3. Device Programming
3-65
Table 3-40. Bit Settings for ESCR1—0xE0
Bit
Name
Reset
Value
Description
31–28
—
All 0s
These bits are reserved.
27–16
INT_VECTOR_RELOCATE
All 1s
These bits represent the 1-Mbyte block of system memory that is
accessed when emulation mode is enabled
(EMULATION_MODE_EN = 1) and a 60x transaction to the address
range 0xFFF0_0000–0xFFFF_FFFF occurs. The 12
most-significant bits of the address (0xFFF) are replaced by these
bits, and the 20 least-significant bits are left unchanged. These bits
have no effect if emulation mode is disabled
(EMULATION_MODE_EN = 0).
15–8
TOP_OF_MEM
All 0s
These bits represent the block address of a 1-Mbyte block that is the
upper address boundary to which the MPC106, as a PCI target, will
respond. These bits have no effect if emulation mode is disabled
(EMULATION_MODE_EN = 0).
7
—
0
This bit is reserved.
6
FD_ALIAS_EN
1
This bit is used in address map B only; it is not used for map A or the
emulation mode map.
0
No response
1
The MPC106, as a PCI target, responds to addresses in the
range 0xFD00_0000–0xFDFF_FFFF, and forwards the
transaction to system memory as 0x0000_0000–0x00FF_FFFF
5
PIRQ_EN
0
When emulation mode is enabled, PIRQ will be asserted if a
PCI-write-to-system-memory occurs when the modified memory
status is 0b00. See Section 7.8, “Emulation Support,” for more
information.
0
PIRQ is disabled.
1
PIRQ is enabled. PIRQ is asserted when a PCI write to
memory occurs and MOD_MEM_STATUS is 0b00.
4
PIRQ_ACTIVE_HIGH
0
PIRQ signal polarity. This bit controls the active state of the PIRQ
signal.
0
PIRQ is active low.
1
PIRQ is active high.
3
PCI_COMPATIBILITY_
HOLE
0
This bit is used for address map B and the emulation mode map
only; it is not used for address map A.
0
The MPC106, as a PCI target, responds to PCI addresses in
the range 0x000A_0000–0x000F_FFFF, and forwards the
transaction to system memory.
1
The MPC106, as a PCI target, does not respond to PCI
addresses in the range 0x000A_0000–0x000F_FFFF.
2
PROC_COMPATIBILITY_
HOLE
0
This bit is used for address map B and the emulation mode map
only; it is not used for address map A.
0
The MPC106 forwards 60x processor-initiated transactions in
the address range 0x000A_0000–0x000B_FFFF to system
memory.
1
The MPC106 forwards 60x processor-initiated transactions in
the address range 0x000A_0000–0x000B_FFFF to the PCI
memory space.