Glossary-4
MPC106 PCIB/MC User's Manual
MOTOROLA
Multiplex
. To combine two or more signals into a single physical pin. The
pin may alternate between the multiple signal functions (such as the
PCI C/BE[3–0] signals), or may provide only one function based on
the configuration (such as the BA0/BR3 signal).
Munging
. A technique used to alter the byte-ordering of data by modifying
its address; commonly used when translating between
big-endian
and
little-endian
data formats.
Nibble
. A sequence of four bits. In the context of ECC, a nibble is either the
high-order four bits (bit 0–3) or the low-order four bits (bits 4–7) in
a byte.
Optional
. A feature, such as an instruction, a register, or an exception, that is
defined by the PowerPC architecture but not required to be
implemented.
Out-of-order.
An aspect of an operation that allows it to be performed ahead
of one that may have preceded it in the sequential model, for
example, speculative operations. An operation is said to be
performed out-of-order if, at the time that it is performed, it is not
known to be required by the sequential execution model.
See
In-order.
Overflow
. An error condition that occurs during arithmetic operations when
the result cannot be stored accurately in the destination register(s).
For example, if two 32-bit numbers are multiplied, the result may not
be representable in 32 bits.
Page
. A 4-Kbyte area of memory, aligned on a 4-Kbyte boundary.
Park
. The act of allowing a bus master to maintain mastership of the bus
without having to arbitrate.
PCI (peripheral component interconnect)
.A computer bus standard,
managed by an industry consortium called the PCI SIG (Special
Interest Group), that uses a 32- or 64-bit multiplexed address/data
bus and provides the interconnect mechanism between peripheral
components.
Physical memory
. The actual memory that can be accessed through the
system’s memory bus.
Pipelining
. A technique that breaks operations, such as instruction
processing or bus transactions, into smaller distinct stages or tenures
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