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MPC106 PCIB/MC User's Manual
MOTOROLA
Figure 3-40 and Table 3-41 describe the bit settings for emulation support configuration
register 2 (ESCR2).
Figure 3-40. Emulation Support Configuration Register 2 (ESCR2)—0xE8
3.2.9.1 Modified Memory Status Register
When the MPC106 is operating in emulation mode, the modified memory status register
tracks the state of system memory that has been modified by PCI masters. See Section 7.8,
“Emulation Support,” for more information. Figure 3-39 and Table 3-40 describe the bit
settings for the modified memory status register.
1
EMULATION_MODE_HW
1
This bit is read-only and indicates that the MPC106 supports the
emulation mode address map.
0
EMULATION_MODE_EN
0
Emulation mode address map enable. This bit, in conjunction with
PICR1[DBG0], controls which address map is used by the MPC106.
See Section 3.1.3, “Emulation Mode Address Map,” for more
information.
0
Emulation mode address map disabled. The MPC106 is
configured for address map A or address map B, depending on
PICR1[ADDRESS_MAP].
1
Emulation mode address map enabled. The MPC106 is
configured for emulation mode address map.
Table 3-41. Bit Settings for ESCR2—0xE8
Bit
Name
Reset
Value
Description
31–8
—
All 0s
These bits are reserved.
7–0
MOD_MEM_SIZE
0x20
These bits configure the size of the modified memory regions in
system memory for the emulation mode address map. Note that
the MPC106 only supports sizes of 4 and 8 Kbytes.
0b1000_0000
16 Kbytes (not supported)
0b0100_0000
8 Kbytes
0b0010_0000
4 Kbytes
0b0001_0000
2 Kbytes (not supported)
0b0000_1000
1 Kbyte (not supported)
0b0000_0100
512 bytes (not supported)
0b0000_0010
256 bytes (not supported)
0b0000_0001
128 bytes (not supported)
Table 3-40. Bit Settings for ESCR1—0xE0 (Continued)
Bit
Name
Reset
Value
Description
31
8
7
0
Reserved
MOD_MEM_SIZE
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0