4-28
ColdFire CF4e Core User’s Manual
For More Information On This Product,
Go to: www.freescale.com
Instructions
The exception operand, contained in longwords 2 and 3 of the FSAVE frame, is always the
value of the destination operand before the operation which caused the exception
commenced. Thus, for dyadic register-to-register operations, the exception operand
contains the value of the destination register before it was overwritten by the operation
which caused the exception. This operand can be retrieved by an exception handler that
needs both original operands in order to process the exception.
4.4 Instructions
This section includes an instruction set summary, execution times, and differences
between ColdFire and 68K FPU programming models. For detailed instruction
descriptions, see the
PRM.
4.4.1 Floating-Point Instruction Overview
ColdFire instructions are 16, 32, or 48 bits long. The general definition of a floating-point
operation and effective addressing mode require 32 bits; some addressing modes require
another 16-bit extension word. Table 4-23 shows the minimum size instruction formats.
The first word is the opword; the second is extension word 1.
Table 4-23. Floating-Point Instruction Formats
Mnemonic
Instruction Code
FABS
1 1 1 1 0 0 1 0 0 0
EA
MODE
EA
REG
0
R
/
M
0
SRC
SPEC DEST
REG
OPMODE
FADD
1 1 1 1 0 0 1 0 0 0
EA
MODE
EA
REG
0
R
/
M
0
SRC
SPEC DEST
REG
OPMODE
FBcc
1 1 1 1 0 0 1 0 1
SZ
COND
PREDICATE
16b displacement or MS Word of 32b
LS Word of 32b Displacement
FCMP
1 1 1 1 0 0 1 0 0 0
EA
MODE
EA
REG
0
R
/
M
0
SRC
SPEC DEST
REG
0 1 1 1 0 0 0
FDIV
1 1 1 1 0 0 1 0 0 0
EA
MODE
EA
REG
0
R
/
M
0
SRC
SPEC DEST
REG
OPMODE
FINT
1 1 1 1 0 0 1 0 0 0
EA
MODE
EA
REG
0
R
/
M
0
SRC
SPEC DEST
REG
0 0 0 0 0 0 1
FINTRZ
1 1 1 1 0 0 1 0 0 0
EA
MODE
EA
REG
0
R
/
M
0
SRC
SPEC DEST
REG
0 0 0 0 0 1 1
FMOVE
1 1 1 1 0 0 1 0 0 0
EA
MODE
EA
REG
0
R
/
M
0
SRC
SPEC DEST
REG
OPMODE
1 1 1 1 0 0 1 0 0 0
EA
MODE
EA
REG
0
1
1
DEST
FMT SRC
REG
0 0 0 0 0 0 0
1 1 1 1 0 0 1 0 0 0
EA
MODE
EA
REG
1
0
dr
REG
SEL
0 0
0
0 0 0 0 0 0 0
FMOVEM
1 1 1 1 0 0 1 0 0 0
EA
MODE
EA
REG
1
1
dr 1 0
0
0 0
REGISTER
LIST
FMUL
1 1 1 1 0 0 1 0 0 0
EA
MODE
EA
REG
0
R
/
M
0
SRC
SPEC DEST
REG
OPMODE
FNEG
1 1 1 1 0 0 1 0 0 0
EA
MODE
EA
REG
0
R
/
M
0
SRC
SPEC DEST
REG
OPMODE
FNOP
1 1 1 1 0 0 1 0 1 0 0 0 0 0 0 0 0
0
0 0 0
0
0 0
0
0 0 0 0 0 0 0
FRESTORE 1 1 1 1 0 0 1 1 0 1
EA
MODE
EA
REG
FSAVE
1 1 1 1 0 0 1 1 0 0
EA
MODE
EA
REG
FSQRT
1 1 1 1 0 0 1 0 0 0
EA
MODE
EA
REG
0
R
/
M
0
SRC
SPEC DEST
REG
OPMODE
F
Freescale Semiconductor, Inc.
n
.