Chapter 9. Core Interface
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9-5
CF4e Pin Characteristics
88
Input
icv1do
—
I-cache level 1 valid bit output
89
Input
ictag0do
[31:9]
I-cache level 0 tag data output
90
Input
icw0do
—
I-cache level 0 written bit output
91
Input
icv0do
—
I-cache level 0 valid bit output
92
Input
iclvl3do
[31:0]
I-cache level 3 data output
93
Input
iclvl2do
[31:0]
I-cache level 2 data output
94
Input
iclvl1do
[31:0]
I-cache level 1 data output
95
Input
iclvl0do
[31:0]
I-cache level 0 data output
96
Input
octag3do
[31:9]
D-cache level 3 tag data output
97
Input
ocw3do
—
D-cache level 3 written bit output
98
Input
ocv3do
—
D-cache level 3 valid bit output
99
Input
octag2do
[31:9]
D-cache level 2 tag data output
100
Input
ocw2do
—
D-cache level 2 written bit output
101
Input
ocv2do
—
D-cache level 2 valid bit output
102
Input
octag1do
[31:9]
D-cache level 1 tag data output
103
Input
ocw1do
—
D-cache level 1 written bit output
104
Input
ocv1do
—
D-cache level 1 valid bit output
105
Input
octag0do
[31:9]
D-cache level 0 tag data output
106
Input
ocw0do
—
D-cache level 0 written bit output
107
Input
ocv0do
—
D-cache level 0 valid bit output
108
Input
oclvl3do
[31:0]
D-cache level 3 data output
109
Input
oclvl2do
[31:0]
D-cache level 2 data output
110
Input
oclvl1do
[31:0]
D-cache level 1 data output
111
Input
oclvl0do
[31:0]
D-cache level 0 data output
112
Input
enspecialkram
—
Enable special KRAM1 mapping
113
Input
kram0size
[3:0]
Encoded KRAM0 size
114
Input
kram0do
[31:0]
KRAM0 data output
115
Input
kram1size
[3:0]
Encoded KRAM1 size
116
Input
kram1do
[31:0]
KRAM1 data output
117
Input
krom0size
[3:0]
Encoded KROM0 size
118
Input
krom0do
[31:0]
KROM0 data output
119
Input
krom0vldrst
—
KROM0 valid at reset
120
Input
krom1size
[3:0]
Encoded KROM1 size
Table 9-1. CF4e Pin Characteristics (Continued)
No.
Type
Name
Bus Width
1
Description
F
Freescale Semiconductor, Inc.
n
.