
Chapter 5. Enhanced Multiply-Accumulate Unit (EMAC)
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5-11
Memory Map/Register Set
int macsr;
} macState;
The following assembly language routine shows the proper sequence for a correct EMAC
state save. This code assumes all Dn and An registers are available for use and the memory
location of the state save is defined by A7.
EMAC_state_save:
move.l macsr,d7
clr.l d0
move.l d0,macsr
move.l acc0,d0
move.l acc1,d1
move.l acc2,d2
move.l acc3,d3
move.l accext01,d4
move.l accext23,d5
move.l mask,d6
movem.l #0x00ff,(a7)
The following code performs the EMAC state restore:
; save the macsr
; zero the register to ...
; disable rounding in the macsr
; save the accumulators
; save the accumulator extensions
; save the address mask
; move the state to memory
EMAC_state_restore:movem.l (a7),#0x00ff; restore the state from memory
move.l #0,macsr
; disable rounding in the macsr
move.l d0,acc0
; restore the accumulators
move.l d1,acc1
move.l d2,acc2
move.l d3,acc3
move.l d4,accext01
; restore the accumulator extensions
move.l d5,accext23
move.l d6,mask
; restore the address mask
move.l d7,macsr
; restore the macsr
By executing this type of sequence, the exact state of the EMAC programming model can
be correctly saved and restored.
5.4.1.1.3 MULS/MULU
MULS and MULU are unaffected by fractional mode operation; operands are still assumed
to be integers.
5.4.1.1.4 Scale Factor in MAC or MSAC instructions
The scale factor is ignored while the MAC is in fractional mode.
5.4.2 Mask Register (MASK)
The 32-bit mask register (MASK) implements the low-order 16 bits, to minimize
complications about loading and storing only 16 bits and the associated alignment
requirements. When the MASK is loaded, the low-order 16 bits of the source operand are
actually loaded into the register. When it is stored, the upper 16 bits are forced to all ones.
This register performs a simple AND with the address. That is, the processor calculates the
normal operand address and, if enabled, that address is then ANDed with {0xFFFF,
MASK[15:0]} to form the final address. So, MASK register bits are cleared, constraining
the address to a certain region. This is used primarily to implement circular queues in
conjunction with the (Ay) + addressing mode.
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