
Chapter 11. Debug Support
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11-27
Background Debug Mode (BDM)
environment, an ASID can optionally be associated with the instruction address in the PC
breakpoint registers. The optional specification of an ASID value is made using PBASID,
and its exact inclusion within the breakpoint specification defined by the PBAC.
PBASID contains one 8-bit ASID values for each PC breakpoint register, as described in
Table 11-21, which allows each PC breakpoint register to be associated with a unique
virtual address and process.
11.5 Background Debug Mode (BDM)
The ColdFire Family implements a low-level system debugger in the microprocessor
hardware. Communication with the development system is handled through a dedicated,
high-speed serial command interface. The ColdFire architecture implements the BDM
controller in a dedicated hardware module. Although some BDM operations, such as CPU
register accesses, require the CPU to be halted, all other BDM commands, such as
memory accesses, can be executed while the processor is running.
BDM is useful for the following reasons:
In-circuit emulation is not needed, so physical and electrical characteristics of the
system are not affected.
BDM is always available for debugging the system and provides a communication
link for upgrading firmware in existing systems.
Provides high-speed cache downloading (500 Kbytes/sec), especially useful for
flash programming
Provides absolute control of the processor, and thus the system. This feature allows
quick hardware debugging with the same tool set used for firmware development.
31
24 23
16 15
8
7
0
Field
PBR3ASID
PBR2ASID
PBR1ASID
PBRASID
Reset
—
R/W
W
Address
0x14
Figure 11-16. PC Breakpoint ASID Register (PBASID)
Table 11-21. PBASID Field Descriptions
Bits
Name
Description
31–24
PBA3SID
PBR
3
ASID. Corresponds to the ASID associated with PBR3.
23–16
PBA2SID
PBR2ASID Corresponds to the ASID associated with PBR2.
15–8
PBA1SID PBR1ASID. Corresponds to the ASID associated with PBR1.
7–0
PBASID
PBRASID. Corresponds to the ASID associated with PBR.
F
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