1-20
ColdFire CF4e Core User’s Manual
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Instruction Set Overview
Table 1-6 describes supervisor-mode instructions.
SUBI
SUBQ
#<data>,Dx
#<data>,<ea>x
L
L
Destination – Immediate Data
→
Destination
SUBX
Dy,Dx
L
Destination – Source – CCR[X]
→
Destination
SWAP
Dx
W
MSW of Dx
LSW of Dx
TAS
<ea>x
B
Destination Tested
→
CCR;
1
→
bit 7 of Destination
TPF
none
#<data>
#<data>
none
W
L
PC + 2
→
PC
PC + 4
→
PC
PC + 6
→
PC
TRAP
#<vector>
none
1
→
S Bit of SR; SP – 4
→
SP; nextPC
→
(SP);
SP – 2
→
SP; SR
→
(SP)
SP – 2
→
SP; Format/Offset
→
(SP)
(VBR + 0x80 +4*n)
→
PC, where n is the TRAP
number
TST
<ea>y
B, W, L
Source Operand Tested
→
CCR
UNLK
Ax
none
Ax
→
SP; (SP)
→
Ax; SP + 4
→
SP
WDDATA
<ea>y
B, W, L
Source
→
DDATA port
Table 1-6. Supervisor-Mode Instruction Set Summary
Instruction
Operand Syntax
Operand Size
Operation
CPUSHL
ic,(Ax)
dc,(Ax)
bc,(Ax)
none
If data is valid and modified, push cache line; invalidate line
if programmed in CACR (synchronizes pipeline)
FRESTORE
<ea>y
none
FPU State Frame
→
Internal FPU State
FSAVE
<ea>x
none
Internal FPU State
→
FPU State Frame
HALT
none
none
Halt processor core
INTOUCH
Ay
none
Instruction fetch touch at (Ay)
MOVE from SR
SR,Dx
W
SR
→
Destination
MOVE from USP
USP,Dx
L
USP
→
Destination
MOVE to SR
<ea>y,SR
W
Source
→
SR; Dy or #<data> source only
MOVE to USP
Ay,USP
L
Source
→
USP
MOVEC
Ry,Rc
L
Ry
→
Rc
RTE
none
none
2 (SP)
→
SR; 4 (SP)
→
PC; SP + 8
→
SP
Adjust stack according to format
STOP
#<data>
none
Immediate Data
→
SR; STOP
WDEBUG
<ea>y
L
Addressed Debug WDMREG Command Executed
Table 1-5. User-Mode Instruction Set Summary (Continued)
Instruction
Operand Syntax
Operand Size
Operation
F
Freescale Semiconductor, Inc.
n
.