Chapter 12. Test
12-25
BIST
# xor function
##########################################################
function xor(first,second)
{if (first == second)
return 0
else
return 1
12.3.7 BIST Test Modes
Production BIST (PBIST) indicates failing or passing devices. Engineering BIST (EBIST)
characterizes memory. These modes are chosen through mtmod[2:0] (see Table 12-3).
PBIST tests all memories in parallel with individual BIST controllers. If one fails, a failflag
is asserted. When memory testing completes, bistdone is asserted.
EBIST uses the same memory BIST algorithm for bit-mapping memories. Due to VLSI
tester limitations, only one memory can be bit-mapped at a time and is chosen through
bistmemory[2:0] which selects one of the potential eight memories listed in Section 12.3.3,
“Power Analysis.” The data of the memory that is characterized is output onto bistdata[3:0].
On Version 4, bistdata operates at half the processor clock frequency. BIST data is captured
at the frequency at which the memories are operating. To output the data, a complete BIST
test is executed outputting the first data (data[3:0]). Next, the test is rerun on the entire
memory selecting bit data[7:4]. This sequence repeats until all memory is bit-mapped. No
data is lost between capturing the memory data at the processor clock speed and
multiplexing the data onto bistdata. BIST algorithms take multiple processor clocks per
address so data is not changing on a processor cycle-by-cycle basis. This flow process is
exited when the MTMOD state changes. Figure 12-16 illustrates this process.
Figure 12-16. Flow of Characterization Method
No
Yes
Start
EBIST
(a = 0)
Run
EBIST
Output
4 bits
(a:a+3)
Test
Done
Incr.
Bits
(a=a+4)
Start
EBIST
F
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