6-24
ColdFire CF4e Core User’s Manual
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Instruction Execution Times
Table 6-9 gives timings for MOVE.L instructions accessing program-visible MAC
registers, along with other MOVE.L timings. Execution times for moving ACC or MACSR
contents into a destination location represent the best-case scenario when the store
instruction is executed and no load, MAC, or MSAC instructions are in the MAC execution
pipeline. In general, these store operations take only 1 cycle to execute, but if preceded
immediately by a load, MAC, or MSAC instruction, the MAC pipeline depth is exposed and
execution time is 3 cycles.
Table 6-9 and Table 6-11 apply only to the MAC. Table 6-15 lists EMAC execution times.
6.5.2 Execution Timings—One-Operand Instructions
Table 6-10 shows standard timings for single-operand instructions.
-(Ay)
1(1/0)
2(1/1)
2(1/1)
2(1/1)
2(1/1)
3(1/1)
2(1/1)
(d16,Ay)
1(1/0)
2(1/1)
2(1/1)
2(1/1)
2(1/1)
—
—
(d8,Ay,Xi*SF)
2(1/0)
3(1/1)
3(1/1)
3(1/1)
—
—
—
(xxx).w
1(1/0)
2(1/1)
2(1/1)
2(1/1)
—
—
—
(xxx).l
1(1/0)
2(1/1)
2(1/1)
2(1/1)
—
—
—
(d16,PC)
1(1/0)
2(1/1)
2(1/1)
2(1/1)
2(1/1)
—
—
(d8,PC,Xi*SF)
2(1/0)
3(1/1)
3(1/1)
3(1/1)
—
—
—
#<xxx>
1(0/0)
1(0/1)
1(0/1)
1(0/1)
—
—
—
Table 6-9. MAC and Miscellaneous Move Execution Times
Opcode
<ea>
Effective Address
Rn
(An)
(An)+
-(An)
(d16,An)
(d8,An,Xi*SF)
(xxx).wl
#<xxx>
move.l
<ea>,ACC
1(0/0)
—
—
—
—
—
—
1(0/0)
move.l
<ea>,MACSR
6(0/0)
—
—
—
—
—
—
6(0/0)
move.l
<ea>,MASK
5(0/0)
—
—
—
—
—
—
5(0/0)
move.l
ACC,Rx
1(0/0)
—
—
—
—
—
—
—
move.l
MACSR,CCR
1(0/0)
—
—
—
—
—
—
—
move.l
MACSR,Rx
1(0/0)
—
—
—
—
—
—
—
move.l
MASK,Rx
1(0/0)
—
—
—
—
—
—
—
moveq
#imm,Dx
—
—
—
—
—
—
—
1(0/0)
mov3q
#imm,<ea>
1(0/0)
1(1/0)
1(1/0)
1(1/0)
1(1/0)
2(1/0)
1(1/0)
—
mvs
<ea>,Dx
1(0/0)
1(1/0)
1(1/0)
1(1/0)
1(1/0)
2(1/0)
1(1/0)
1(0/0)
mvz
<ea>,Dx
1(0/0)
1(1/0)
1(1/0)
1(1/0)
1(1/0)
2(1/0)
1(1/0)
1(0/0)
Table 6-8. Move Long Execution Times (Continued)
Source
Destination
Rx
(Ax)
(Ax)+
-(Ax)
(d16,Ax)
(d8,Ax,Xi*SF)
(xxx).wl
F
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