CONTENTS
Paragraph
Number
Title
Page
Number
Contents
vii
4.3.11
4.3.12
4.3.13
4.3.14
4.3.15
4.3.16
4.4
4.4.1
4.4.2
4.4.3
Operand Error (OPERR)............................................................................... 4-23
Overflow (OVFL)......................................................................................... 4-23
Underflow (UNFL)....................................................................................... 4-24
Divide-by-Zero (DZ) .................................................................................... 4-25
Inexact Result (INEX).................................................................................. 4-25
Floating-Point State Frames.......................................................................... 4-26
Instructions........................................................................................................ 4-28
Floating-Point Instruction Overview............................................................ 4-28
Floating-Point Instruction Execution Times................................................. 4-30
Key Differences between ColdFire and MC680x0 FPU Programming Models..
4-31
Chapter 5
Enhanced Multiply-Accumulate Unit (EMAC)
Freescale Semiconductor, Inc.
5.1
5.2
5.3
5.4
5.4.1
5.4.1.1
5.4.1.1.1
5.4.1.1.2
5.4.1.1.3
5.4.1.1.4
5.4.2
5.5
5.5.1
5.5.2
Multiply-Accumulate Unit.................................................................................. 5-1
An Introduction to the MAC............................................................................... 5-2
General Operation............................................................................................... 5-3
Memory Map/Register Set.................................................................................. 5-6
MAC Status Register (MACSR)..................................................................... 5-6
Fractional Operation Mode......................................................................... 5-9
Rounding ................................................................................................ 5-9
Saving and Restoring the EMAC Programming Model....................... 5-10
MULS/MULU...................................................................................... 5-11
Scale Factor in MAC or MSAC instructions........................................ 5-11
Mask Register (MASK)................................................................................ 5-11
EMAC Instruction Set Summary...................................................................... 5-12
Data Representation...................................................................................... 5-13
MAC Opcodes .............................................................................................. 5-13
Chapter 6
Instruction Pipeline and Timing
6.1
6.2
6.3
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
Basic V4 Pipeline Strategy................................................................................. 6-1
Instruction Fetch Pipeline (IFP).......................................................................... 6-4
Operand Execution Pipeline (OEP).................................................................... 6-6
V4 OEP Conceptual Pipeline Model.............................................................. 6-6
Instruction Folding and the Limited Superscalar OEP................................... 6-9
Sequence-Related OEP Stalls....................................................................... 6-11
EMAC-Specific OEP Sequence Stalls.......................................................... 6-13
FPU-Specific OEP Sequence Stalls.............................................................. 6-14
Operand Memory Sequence-Related Stalls.................................................. 6-16
F
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