
Chapter 10. Memory Management Unit (MMU)
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Chapter 10
Memory Management Unit (MMU)
This chapter describes the ColdFire virtual memory management unit (MMU), which
provides virtual-to-physical address translation and memory access control. The MMU
consists of memory-mapped control, status, and fault registers that provide access to
translation-lookaside buffers (TLBs). Software can control address translation and access
attributes of a virtual address by configuring MMU control registers and loading TLBs.
With software support, the MMU provides demand-paged, virtual addressing.
10.1 Features
The MMU has the following features:
MMU memory-mapped control, status, and fault registers
— Support a flexible, software-defined virtual environment
— Provide control and maintenance of TLBs
— Provide fault status and recovery information functions
Separate, 32-entry, fully associative instruction and data TLBs (Harvard TLBs)
— Resides in the K-Bus controller
— Operates in parallel with the K-Bus memories
— Suffers no performance penalty on TLB hits
— Supports 1-, 4-, and 8-Kbyte and 1-Mbyte page sizes concurrently
— Contains register-based TLB entries
Core extensions:
— User stack pointer
— All K-Bus access error exceptions are precise and recoverable
Harvard TLB provides 97% of baseline performance on large embedded
applications using equivalent V4 without MMU support as a baseline.
10.2 Virtual Memory Management Architecture
The ColdFire memory management architecture provides a demand-paged, virtual-address
environment with hardware address translation acceleration. It supports supervisor/user,
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