
Chapter 5. Enhanced Multiply-Accumulate Unit (EMAC)
For More Information On This Product,
Go to: www.freescale.com
5-13
EMAC Instruction Set Summary
5.5.1 Data Representation
MACSR[6–5] selects one of the following three modes, where each mode defines a unique
operand type.
Two’s complement signed integer: In this format, an N-bit operand value lies in the
range -2
(N-1)
< operand < 2
(N-1)
- 1. The binary point is right of the lsb.
Unsigned integer: In this format, an N-bit operand value lies in the range 0 < operand
< 2
N
- 1. The binary point is right of the lsb.
Two’s complement, signed fractional: In an N-bit number, the first bit is the sign bit.
The remaining bits signify the first N-1 bits after the binary point. Given an N-bit
number,
a
N-1
a
N-2
a
N-3
... a
2
a
1
a
0
, its value is given by the equation in Figure 5-8.
Figure 5-8. Two’s Complement, Signed Fractional Equation
This format can represent numbers in the range -1 < operand < 1 - 2
(N-1)
.
For words and longwords, the largest negative number that can be represented is -1, whose
internal representation is 0x8000 and 0x8000_0000, respectively. The largest positive word
is 0x7FFF or (1 - 2
-15
); the most positive longword is 0x7FFF_FFFF or (1 - 2
-31
).
5.5.2 MAC Opcodes
MAC opcodes are mapped into line A and are described in the
PRM
(see URL
http://www.motorola.com/ColdFire/).
Store MACSR to CCR
MOV.L MACSR,CCR
Write the contents of MACSR to the CCR
Load MAC Mask Reg
MOV.L {Ry,#imm},MASK
Writes a value to the MASK register
Store MAC Mask Reg
MOV.L MASK,Rx
Writes the contents of the MASK to a CPU register
Load AccExtensions01
MOV.L {Ry,#imm},ACCext01
Loads the accumulator 0,1 extension bytes with a 32-bit
operand
Load AccExtensions23
MOV.L {Ry,#imm},ACCext23
Loads the accumulator 2,3 extension bytes with a 32-bit
operand
Store AccExtensions01 MOV.L ACCext01,Rx
Writes the contents of accumulator 0,1 extension bytes into a
CPU register
Store AccExtensions23 MOV.L ACCext23,Rx
Writes the contents of accumulator 2,3 extension bytes into a
CPU register
Table 5-3. EMAC Instruction Summary
Command
Mnemonic
Description
value
1 a
N
1
–
(
)
–
2
i
1
N
–
+
(
)
ai
i
0
=
N
2
–
∑
+
=
F
Freescale Semiconductor, Inc.
n
.