
Glossary of Terms and Abbreviations
Glossary-3
Cache flush
. An operation that removes from a cache any data from a
specified address range. This operation ensures that any modified
data within the specified address range is written back to main
memory. This operation is generated typically by a Data Cache
Block Flush (
dcbf
) instruction.
Caching-inhibited
. A memory update policy in which the
cache
is bypassed
and the load or store is performed to or from main memory.
Cast-outs
.
Cache blocks
that must be written to memory when a cache miss
causes a cache block to be replaced.
Clear
. To cause a bit or bit field to register a value of zero.
See also
Set.
Context synchronization
. An operation that ensures that all instructions in
execution complete past the point where they can produce an
exception
, that all instructions in execution complete in the context
in which they began execution, and that all subsequent instructions
are
fetched
and executed in the new context. Context synchronization
may result from executing specific instructions (such as
isync
or
rfi
)
or when certain events occur (such as an exception).
Copy-back
. An operation in which modified data in a
cache block
is copied
back to memory.
Denormalized number
.
A nonzero floating-point number whose
exponent
has a reserved value, usually the format's minimum, and whose
explicit or implicit leading significand bit is zero.
Direct-mapped cache
. A cache in which each main memory address can
appear in only one location within the cache, operates more quickly
when the memory request is a cache hit.
Direct-store.
Interface available on PowerPC processors only to support
direct-store devices from the POWER architecture. When the T bit
of a
segment descriptor
is set, the descriptor defines the region of
memory that is to be used as a direct-store segment. Note that this
facility is being phased out of the architecture and will not likely be
supported in future devices. Therefore, software should not depend
on it and new software should not use it.
D