
Contents
ix
CONTENTS
Paragraph
Number
Title
Page
Number
8.8.2.3
8.8.2.4
lwarx
Software Implications................................................................................8-10
/
stwcx.
Address-Only Operation......................................................8-10
Appendix A
Processor Summary
Appendix B
Processor Clocking Overview
B.1
B.2
PowerPC 601 Microprocessor Clocking.............................................................B-1
PowerPC 603 and PowerPC 604 Microprocessor Clocking...............................B-2
Appendix C
Processor Upgrade Suggestions
C.1
C.2
C.3
PowerPC 601 Processor Upgrade to 60x............................................................C-1
PowerPC 603 Processor Upgrade to 604 or 60x.................................................C-1
PowerPC 604 Processor Upgrade to 60x............................................................C-3
Appendix D
L2 Considerations for the PowerPC 604 Processor
D.1
D.2
D.2.1
D.2.2
D.2.3
D.3
D.3.1
D.3.2
D.3.3
D.4
D.4.1
D.4.2
D.4.3
D.5
D.5.1
D.5.2
D.5.3
Unfiltered Snooping............................................................................................D-2
Keeping a Copy of L1 Tags................................................................................D-2
Requirements for Saving State Information....................................................D-3
Operations Required for Processor Bus Operations........................................D-3
Forwarding System Bus Operations to the Processor.....................................D-4
Maintaining L1 State and Tags...........................................................................D-4
Requirements for Saving State Information....................................................D-5
Operations Required for Processor Bus Operations........................................D-5
Forwarding System Bus Operations to the Processor.....................................D-6
Simple L1 Inclusion............................................................................................D-6
Requirements for Saving State Information....................................................D-6
Operations Required for Processor Bus Operations........................................D-6
Forwarding System Bus Operations to the Processor.....................................D-7
Marked L1 Inclusion...........................................................................................D-7
Requirements for Saving State Information....................................................D-7
Operations Required for Processor Bus Operations........................................D-8
Forwarding System Bus Operations to the Processor.....................................D-8