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參數(shù)資料
| 型號(hào)： | PowerPC 601 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 32-Bit Microprocessor(32位微處理器) |
| 中文描述： | 32位微處理器（32位微處理器） |
| 文件頁(yè)數(shù)： | 124/250頁(yè) |
| 文件大?。?/td> | 916K |
| 代理商： | POWERPC 601 |
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4-18
PowerPC Microprocessor Family: The Bus Interface for 32-Bit Microprocessors
4.7.13 ICBI
This operation is issued by a processor that executes an instruction cache block invalidate
(
icbi
) instruction. All copies of the addressed block in bus-attached instruction caches are
invalidated.
The 603 does not broadcast or snoop ICBI operations.
The
icbi
causes the 601 to broadcast a kill operation to the bus.
4.7.14 Read with No Intent to Cache (RWNITC)
Read with no intent to cache (RWNITC) operations are issued by a bus-attached device as
TT[0–4] = 0b01011 (like a read, but with TT4 = 1). The 603 and 604 snoop this and, if they
get a cache hit on a block marked M, push the block and mark it E (the ordinary response
would be to push and mark it S in 604 and push and invalidate for 603).
For a graphics adapter that reads display data from memory, this data may be in the
processor’s cache and the subject of frequent updates. Because the adapter does not cache
the data, there is no reason for the processor to leave the block in the S state, requiring a bus
operation to regain E access. Because the 603 has no S state, it must also reread the data.
4.7.15 XFERDATA
XFERDATA read and write bus transactions result from execution of the
eciwx
or
ecowx
instructions, respectively. These instructions help certain adapter types (especially
displays) make high-speed data transfers with memory by calculating an effective address,
translating it, and presenting the resulting physical address to the adapter.
The XFERDATA read and write transfer a word of data to or from the processor,
respectively. They also present the 4-bit resource ID (RID) field, which is stored in the
processor’s transfer control register (TCR) to the bus, using the concatenation of the bits
TBST || TSIZ[0–2]. These transactions are unique in the sense that the address that is
transferred does not select the slave device; it is simply being passed to the slave device for
use in a subsequent transaction. Rather, the RID field is used to select the appropriate slave
device. Although it is intended that the slave device selected by the RID bits use the address
transferred in a subsequent data transfer, the exact nature of this data transfer is not defined
by 60x bus architecture. It is a private transfer that can be defined by the system like any
other direct-memory access.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PowerPC 603e | 32-Bit Microprocessor(32位微處理器) |
| PowerPC 603 | 32-Bit Microprocessor(32位微處理器) |
| PowerPC 604e | 32-Bit Microprocessor(32位微處理器) |
| PowerPC 604 | 32-Bit Microprocessor(32位微處理器) |
| PPC7447RX1000NB | PPC7457RX1000NB |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| POWERPLUG15W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:AC/DC POWER SUPPLY |
| POWERPLUG24W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:AC/DC POWER SUPPLY |
| POWERPLUS 2C 2500MAH | 制造商:Energizer Battery Company 功能描述: |
| POWERPLUS 2D 2500MAH | 制造商:Energizer Battery Company 功能描述: |
| POWERPLUS 4AAA 850MAH | 制造商:Energizer Battery Company 功能描述: |
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