List of Tables
(continued)
Table
Page
Agere Systems Inc.
Agere Systems—Proprietary
Use pursuant to Company instructions
13
Data Sheet
June 2001
DSP16410B Digital Signal Processor
Table 205. Timing Requirements for PIU Data Write Operations..................................................................... 292
Table 206. Timing Characteristics for PIU Data Write Operations ................................................................... 292
Table 207. Timing Requirements for PIU Data Read Operations .................................................................... 293
Table 208. Timing Characteristics for PIU Data Read Operations................................................................... 293
Table 209. Timing Requirements for PIU Register Write Operations............................................................... 294
Table 210. Timing Characteristics for PIU Register Write Operations ............................................................. 294
Table 211. Timing Requirements for PIU Register Read Operations............................................................... 295
Table 212. Timing Characteristics for PIU Register Read Operations ............................................................. 295
Table 213. Timing Requirements for SIU Passive Frame Mode Input............................................................. 296
Table 214. Timing Requirements for SIU Passive Channel Mode Input .......................................................... 296
Table 215. Timing Requirements for SIU Passive Frame Mode Output .......................................................... 297
Table 216. Timing Characteristics for SIU Passive Frame Mode Output......................................................... 297
Table 217. Timing Requirements for SIU Passive Channel Mode Output ....................................................... 298
Table 218. Timing Characteristics for SIU Passive Channel Mode Output...................................................... 298
Table 219. Timing Requirements for SCK External Clock Source................................................................... 299
Table 220. Timing Requirements for SIU Active Frame Mode Input................................................................ 300
Table 221. Timing Characteristics for SIU Active Frame Mode Input............................................................... 300
Table 222. Timing Requirements for SIU Active Channel Mode Input............................................................. 301
Table 223. Timing Characteristics for SIU Active Channel Mode Input............................................................ 301
Table 224. Timing Requirements for SIU Active Frame Mode Output............................................................. 302
Table 225. Timing Characteristics for SIU Active Frame Mode Output............................................................ 302
Table 226. Timing Requirements for SIU Active Channel Mode Output .......................................................... 303
Table 227. Timing Characteristics for SIU Active Channel Mode Output......................................................... 303
Table 228. ST-Bus 2x Input Timing Requirements........................................................................................... 304
Table 229. ST-Bus 2x Output Timing Requirements........................................................................................ 305
Table 230. ST-Bus 2x Output Timing Characteristics ...................................................................................... 305
Table 231. Pin Name Inconsistencies .............................................................................................................. 306
Table 232. Register Name Inconsistencies...................................................................................................... 306