
4 Hardware Architecture
(continued)
4.15 Parallel Interface Unit (PIU)
(continued)
Table 86. Memory Read Commands
(continued)
4.15.5 Host Commands
(continued)
4.15.5.3 Memory Read Commands
(continued)
Data Sheet
June 2001
DSP16410B Digital Signal Processor
Agere Systems Inc.
Agere Systems—Proprietary
Use pursuant to Company instructions
147
4.15.5.4 Flow Control for Memory Read Commands
The host performs flow control for memory read commands by one of two methods:
1. The host can monitor the PRDY pin to extend an access that has been initiated and wait for PRDY to be
asserted. This method must be used for the
read_pdo
,
read_pdo++
, and
rdpf_pdo++
commands and can be
used for the
unld_pdo
command.
2. If the host is unable to use the PRDY pin for flow control, it cannot use the
read_pdo
,
read_pdo++
, or
rdpf_pdo++
command to read memory and must instead use the combination of the
load_pdo
and
unld_pdo
commands. The host monitors the POBE field (
PCON
[0]—see
Table 73 on page 133
) to determine if
PDO
is full
and can be read with the
unld_pdo
command, as shown in the following pseudocode:
Issue the load_pdo command to the core
Do:
Issue a read_pcon command to the core
Repeat until POBE is 0
Issue the unld_pdo command
// Fetch a word from DSP16410B memory
// and place into PDO register.
// Host read of PCON.
// Wait for POBE = 0.
// Data in PDO now on PD[15:0].
rdpf_pdo++
This command is a host read with prefetch. It is the highest-performance command for host reads of contig-
uous blocks of memory because it causes the DMAU to fetch the block of data as double words (32 bits).
Because the host reads the data as single words (16 bits), the PIU stores the other half of the double word in
a prefetch buffer. As a result, the host
must
adhere to the following rules to use this command:
Before the host issues its first
rdpf_pdo++
command with a new memory address, it
must
first issue a
read_pdo++
command. This flushes the prefetch buffer from any previously issued
rdpf_pdo++
com-
mand.
The host
must not
issue a command that reads or writes
PA
,
PCON
,
HSCRATCH,
or
DSCRATCH
within
a series of
rdpf_pdo++
commands.
The host
must
use proper flow control with this command (see
Section 4.15.5.4
).
For every two
rdpf_pdo++
commands issued by the host, the DMAU and PIU perform the following:
The PIU requests the DMAU to fetch the double word
pointed to by the contents of
PA
.
The PIU postincrements
PA
by two to point to the next double-word location.
The PIU places the first word (the single word at the address in
PA
) into
PDO
, places the second word (the
single word at the address in
PA
+ 1) into the prefetch buffer, and drives the word in
PDO
onto PD[15:0].
In response to the second
rdpf_pdo++
command issued by the host, the PIU places the second word (the
contents of the prefetch buffer) into
PDO
and drives the word in
PDO
onto PD[15:0].
This command achieves an average throughput of one word per seven CLK cycles.
If
PA
contains an odd address, the PIU requests a single-word access for the first
rdpf_pdo++
command in the sequence because the DMAU
requires all double-word accesses to have even addresses. All subsequent
rdpf_pdo++
commands in the sequence have even addresses
and the PIU requests double-word accesses.
Command
Mnemonic
Description