Table 133. F1E Function Statement Syntax
(continued)
6 Software Architecture
(continued)
6.1 Instruction Set Quick Reference
(continued)
Data Sheet
June 2001
DSP16410B Digital Signal Processor
222
Agere Systems—Proprietary
Use pursuant to Company instructions
Agere Systems Inc.
Special-Purpose MAC Function Statements for Viterbi
ADDER
aDE=aSEE+p0+p1
aDE=aSEE+p0+p1
aDE=aSE+p0+p1
ALU
xl=aSPEl+yl
xl=aSPEl–yl
Multipliers
p1=xl**2
p1=xl**2
p1=xl**2
xh=aSPEh+yh
xh=aSPEh–yh
p0=xh**2
p0=xh**2
p0=xh**2
Special-Purpose MAC Function Statement for FFT
ADDER
aDPE=–aSPE+p1
ALU
Multipliers
p1=xl*yl
aDEE=–aSEE+p0
p0=xh*yh
ALU Function Statements
aDE=
aSE OP
y
aSE–y
aSE&y
aDE=aDE
±
aSE
Special-Purpose ALU/ACS, ADDER/ACS Function Statements for Viterbi
ALU/ACS
aDEE=cmp0(aSEE,aDEE)
aDEE=cmp0(aSEE,aDEE)
aDE=cmp0(aSE,aDE)
aDEE=cmp1(aSE,aDEE)
aDEEh=cmp1(aSEEh,aSEEl)
aDE=cmp1(aSE,aDE)
aDEE=cmp2(aSE,aDEE)
aDE=cmp2(aSE,aDE)
aDEE=aSEE+y
aDEE=aSEE
y
aDEEh=aSEh+yh
aDEEl=aSEl+yl
aDEEh=aSEh
yh
aDEEl=aSEl
yl
ADDER
aDPE=aDPE+aSPE
aDPE=cmp0(aSPE,aDPE)
aDPE=aDEE–aSE
aDPEh=cmp1(aSPEh,aSPEl)
aDPE=aDEE–aSE
aDPE=aSPE–y
aDPE=aSPE+y
aDPEh=aSEh
yh
aDPEh=aSEh+yh
aDPEl=aSEl
yl
aDPEl=aSEl+yl
Special-Purpose ALU, BMU Function Statements
ALU
aDEE=rnd(aDPE)
BMU
aDPE=aSEE>>aSPEh
aDE=aSEE>>aSPEh
aSE=aSE<<ar3
aDE=aSE<<ar3
aDE=aSE<<<ar3
aDPEh=exp(aSE)
aDE=abs(aDE)
aDEE=min(aDPE,aDEE)
DAU flags are affected by the ALU or ALU/ACS operation (except for the split-mode function which does not affect the flags). If there is no ALU or
ALU/ACS operation, the DAU flags are affected by the ADDER or BMU operation.
If
auc0
[10] (FSAT field) is set, the result of the add/subtract of the first two operands is saturated to 32 bits prior to adding/subtracting the third operand
and the final result is saturated to 32 bits.
§ If
auc0
[9] = 1, the least significant bit of
p1>>15
is cleared.
This is a 16-bit operation. The DAU stores the result in the high half of the destination accumulator and clears the low half.
This split-mode instruction does not affect the DAU flags. Do not set FSAT for this instruction because if FSAT is set, the entire 32 bits are saturated.