Data Addendum
May 2001
DSP16410C Digital Signal Processor
Agere Systems Inc.
23
7 Electrical Characteristics and Requirements
(continued)
7.4 Power Supply Sequencing Issues
(continued)
7.4.2 External Power Sequence Protection Circuits
This section discusses external power sequence protection circuits which may be used to meet the recommenda-
tions discussed in Section 7.4.1. For the purpose of this discussion, the dual supply configuration of Figure 7 will
be used. The recommendations for this series supply system apply to parallel supply configurations where a com-
mon power bus simultaneously controls both the internal and external supplies.
1563.a(F)
Figure 7. Power Supply Example
Figure 7 illustrates a typical supply configuration. The external power regulator provides power to the internal
power regulator.
Use of schottky diode D1 to bootstrap the V
DD
2 supply from the V
DD
1 supply is recommended. D1 ensures that the
V
SEP
recommendation is met during device powerdown and powerup. In addition, D1 protects the DSP16410C
from damage in the event of an external power regulator failure.
Diode network D0, which may be a series of diodes or a single zener diode, bootstraps the V
DD
1 supply. After
V
DD
2 is a fixed voltage above V
DD
1 (2.4 V as determined by D0), the V
DD
2 supply will power V
DD
1 until D0 is cut
off as V
DD
1 achieves its operating voltage. If T
SEPU
/T
SEPD
recommendations are met, D0 is not required.
Since D0
protects the DSP16410C from damage in the event of an internal supply failure and reduces T
SEPU
, use of D0 is
recommended. To ensure D0 cutoff during normal system operation, D0
’
s forward voltage (V
F
) should be 2.4 V. D0
should be selected to ensure a minimum V
DD
1 of 0.8 V under DSP load.
EXTERNAL
POWER
REGULATOR
INTERNAL
POWER
REGULATOR
SYSTEM
POWER BUS
V
DD
2
V
DD
1
2.4 V
D0
D1
DSP1640C