
Data Sheet
June 2001
DSP16410B Digital Signal Processor
80
Agere Systems—Proprietary
Use pursuant to Company instructions
Agere Systems Inc.
4 Hardware Architecture
(continued)
4.13 Direct Memory Access Unit (DMAU)
(continued)
4.13.2 Registers
(continued)
Table 44. SBAS
0—3
(SWT
0—3
Source Base Address) Registers
See
Table 29 starting on page 66
for the memory addresses of these registers.
Table 45. DBAS
0—3
(SWT
0—3
Destination Base Address) Registers
See
Table 29 starting on page 66
for the memory addresses of these registers.
19—0
Source Base Address
Bit
Field
Description
R/W
Reset
Value
X
19—0
Source Base
Address
The program must initialize the
SBAS
0—3
register with the starting address of the
one-dimensional or two-dimensional source array for the corresponding channel
(read data). If the corresponding AUTOLOAD field (
CTL
0—3
[0]) is set, the DMAU
copies the contents of
SBAS
0—3
to the corresponding
SADD
0—3
register after
the transfer of an entire array is complete. The DMAU does not modify
SBAS
0—3
.
R/W
For this column, X indicates unknown on powerup reset and unaffected on subsequent reset.
19—0
Destination Base Address
Bit
Field
Description
R/W
Reset
Value
X
19—0
Destination
Base Address
The program must initialize the
DBAS
0—3
register with the starting address of the
one-dimensional or two-dimensional destination array for the corresponding channel
(write data). If the corresponding AUTOLOAD field (
CTL
0—3
[0]) is set, the DMAU
copies the contents of
DBAS
0—3
to the corresponding
DADD
0—3
register after
the transfer of an entire array is complete. The DMAU does not modify
DBAS
0—3
.
R/W
For this column, X indicates unknown on powerup reset and unaffected on subsequent reset.