
XRT7245
DS3 UNI FOR ATM
á
PRELIMINARY
REV. 1.03
70
selection of Bits 0 and 1 of this register. In particular,
if this additional requirement is implemented, the
Receive DS3 Framer will perform a frame search if it
detects P-bit errors in at least 2 out of 5 DS3 Frames.
Writing a “1” to this bit-field imposes this additional
requirement. Whereas, writing a ‘0’ causes the
Receive DS3 Framer to waive this requirement.
For more information on “Framing with Parity” please
see Section 7.1.2.2.1.
Bit 1—FSync Algo
This ‘Read/Write’ bit-field, in conjunction with Bits 0
and 2 of this register, allows the user to completely
define the Frame Maintenance Criteria of the Receive
DS3 Framer. This particular bit-field allows the user
to define the Frame Maintenance Criteria as it applies
to F-bits.
If the user writes a “1” to this bit-field, then the
Receive DS3 Framer will declare an “Out of Frame”
(OOF) condition if 3 out of 16 F-Bits are in Error. If
the user writes a “0” to this bit-field, then the Receive
DS3 Framer will declare an “Out of Frame” (OOF)
condition if 6 out of 16 F-bits are in error. For more
information on the use of this bit, and the Framing
Maintenance operation of the Receive DS3 Framer,
please see Section 7.1.2.2.2.
Bit 0—MSync Algo
This ‘Read/Write’ bit-field in conjunction with Bits 1
and 2 of this register, allows the user to completely
define the “Frame Maintenance” Criteria of the
Receive DS3 Framer. This particular bit-field allows
the user to define the Frame Maintenance criteria, as
it applies to M-bits.
If the user writes a “1” to this bit-field, then the
Receive DS3 Framer will declare an “Out of Frame”
(OOF) condition if 3 out of 4 M-bits are in error. If the
user writes a “0” to this bit-field, then the Receive
DS3 Frame will ignore the occurrence of M-bit errors
while operating in the Frame Maintenance mode. For
more information on the use of this bit-field, and the
Framing Maintenance operation of the Receive DS3
Framer, please see Section 7.1.2.2.2.
3.3.2.15
Rx DS3 Status Register
Bit 4—RxFERF (Far End Receive Failure)
This “Read Only” bit-field is asserted when the Receive
DS3 Framer detects a “Yellow Alarm” (e.g., the X-bits
are set to “0”) in the incoming DS3 data stream. This
bit-field is reset to “0”, when the Receive DS3 Framer
no longer detects the “Yellow Alarm” condition in the
incoming DS3 data stream.
For more information on Yellow Alarms, please see
Section 7.1.2.3.4.
Bit 3—RxAIC
This “Read Only” bit-field reflects the value of the AIC
bit-field, within the incoming DS3 Frames, as detected
by the Receive DS3 Framer. This bit-field is set to “1”
if the incoming frame is determined to be in the C-bit
Parity Format (AIC bit = 1) for at least 63 consecutive
frames. This bit-field is set to “0” if two (2) or more
M-frames, out of the last 15 M-frames, contain a “0”
in the AIC bit position.
Bits 2-0 RxFEBE[2:0]
These “Read Only” bit-fields reflect the latest received
FEBE (Far End Block Error) values. These bit-fields
are set to “011” when the far-end Receive DS3 Framer
has detected framing or parity errors; and are set to
“111” when no framing or parity errors have been
detected by the far-end receiver.
For more information on the FEBE bits, please see
Sections 6.4.2.3 and 7.1.2.7.
Address = 0Fh, Rx DS3 Status Register
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
Unused
RxFERF
RxAIC
RxFEBE [2]
RxFEBE [1]
RxFEBE [0]
RO
RO
RO
RO
RO
RO
RO
RO
0
0
0
0
0
0
0
0