
XRT7245
DS3 UNI FOR ATM
á
PRELIMINARY
REV. 1.03
12
24
TxLev
O
Transmit Line Build Enable/Disable Select (to be connected to the TxLev input
pin of the XRT7300 DS3/E3 LIU IC).
This output pin is intended to be connected to the TxLev input pin of the XRT7300 DS3/
E3 LIU IC. The user can control the state of this output pin by writing a “0” or a “1” to Bit
2 (TxLev) within the Line Interface Driver Register (Address = 72h).
If the user commands this signal to toggle “high” then it will disable the “Transmit Line
Build-Out” circuitry within the XRT7300 device. In this case, the XRT7300 device will
output unshaped (square-wave) pulses onto the “Transmit Line Signal”. In order to
insure that the XRT7300 device generates a line signal that is compliant with the
Bellcore GR-499-CORE Pulse Template requirements (at the Cross-Connect), the
user is advised to set this output pin high, if the cable length (between the Transmit
Output of the XRT7300 device and the Cross-Connect) is greater than 225 feet.
Conversely, if the user commands this signal to toggle “high”, then it will enable the
“Transmit Line Build-Out” circuitry within the XRT7300 device. In this case, the
XRT7300 device will output shaped pulses onto the “Transmit Line Signal”. In order to
ensure that the XRT7300 device generates a line signal that is compliant with the
Bellcore GR-499-CORE Pulse Template requirements (at the Cross-Connect), the
user is advised to set this output pin low, if the cable length (between the Transmit
Output of the XRT7300 device and the Cross Connect) is less than 225 ft. of cable.
Writing a “1” to Bit 2 of the Line Interface Drive Register (Address = 72h) will cause this
output pin to toggle “high”. Writing a “0” to this bit-field will cause this output pin to toggle
“l(fā)ow”.
Note:
If the customer is not using the XRT7300 DS3/E3 LIU IC, then he/she can use
this output pin for a variety of other purposes.
25
D1
I/O
Bi-Directional Data bus (Microprocessor Interface Section):
(Please see descrip-
tion for D15)
26
RLOOP
O
Remote Loop-back Output Pin (to the XRT7300 DS3/E3 LIU IC).
This output pin is intended to be connected to the RLOOP input pin of the XRT7300 LIU
IC. The user can command this signal to toggle “high” and, in turn, force the XRT7300
into the “Remote Loop-back” mode. Conversely, the user can command this signal to
toggle “l(fā)ow” and allow the XRT7300 device to operate in the normal mode. (For a
detailed description of the XRT7300 LIU IC’s operation during Remote Loop-back,
please see the XRT7300 DS3/E3/STS-1 LIU IC Data Sheet).
Writing a “1” to bit 1 of the “Line Interface Drive Register (Address = 72h) will cause
this output pin to toggle “high”. Writing a “0” to this bit-field will cause the RLOOP out-
put to toggle “l(fā)ow”.
Note:
If the customer is not using the XRT7300 DS3/E3/STS-1 IC, then he/she can
use this output pin for a variety of other purposes.
27
D0
I/O
Bi-Directional Data bus (Microprocessor Interface Section):
(Please see descrip-
tion for D15)
PIN DESCRIPTION (CONT’D)
P
IN
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YMBOL
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ESCRIPTION