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PRELIMINARY
DS3 UNI FOR ATM
XRT7245
REV. 1.03
III
Address = 06h, Test Cell Control and Status Register .............................................................................. 66
Bit 4—Test Cell (Generator/Receiver) Enable ............................................................................................. 66
Bit 3—Line*/System (Side Testing) .............................................................................................................. 66
Bit 2—One Shot Test ..................................................................................................................................... 66
Bit 1—One Shot Done ................................................................................................................................... 67
Bit 0—PRBS (Pseudo-Random Byte Sequence) Lock ............................................................................... 67
Address = 07h, Future Use ........................................................................................................................... 67
Address = 08h, Test Cell Header Byte-1 ...................................................................................................... 67
Address = 09h, Test Cell Header Byte-2 ...................................................................................................... 67
Address = 0Ah, Test Cell Header Byte-3 ..................................................................................................... 68
Address = 0Bh, Test Cell Header Byte-4 ..................................................................................................... 68
Address = 0Ch, Test Cell Error Accumulator—MSB .................................................................................. 68
Address = 0Dh, Test Cell Error Accumulator—LSB ................................................................................... 69
Address = 0Eh, Rx DS3 Configuration and Status Register ...................................................................... 69
Bit 7—RxAIS—Receive AIS Signal ............................................................................................................... 69
Bit 6—RxLOS—Receive LOS Condition ...................................................................................................... 69
Bit 5—RxIdle—Receive Idle Condition ........................................................................................................ 69
Bit 4—RxOOF—Out of Frame Condition ..................................................................................................... 69
Bit 3—Int (Receive DS3 Framer) LOS Disable ............................................................................................ 69
Bit 2—Framing On Parity .............................................................................................................................. 69
Bit 1—FSync Algo ......................................................................................................................................... 70
Bit 0—MSync Algo ......................................................................................................................................... 70
Address = 0Fh, Rx DS3 Status Register ...................................................................................................... 70
Bit 4—RxFERF (Far End Receive Failure) ................................................................................................... 70
Bit 3—RxAIC .................................................................................................................................................. 70
Bits 2-0 RxFEBE[2:0] ..................................................................................................................................... 70
Address = 10h, Rx DS3 Interrupt Enable Register ..................................................................................... 71
Bit 7—CP Bit Error Interrupt Enable ............................................................................................................ 71
Bit 6—LOS Interrupt Enable ......................................................................................................................... 71
Bit 5—AIS Interrupt Enable ........................................................................................................................... 71
Bit 4—Idle (Condition) Interrupt Enable ...................................................................................................... 71
Bit 3—FERF Interrupt Enable ....................................................................................................................... 71
Bit 2—AIC Interrupt Enable .......................................................................................................................... 71
Bit 1—OOF Interrupt Enable ......................................................................................................................... 71
Bit 0—Parity Error Interrupt Enable ............................................................................................................. 71
Address = 11h, RxDS3 Interrupt Status Register ....................................................................................... 72
Bit 7—CP Bit Error Interrupt Status ............................................................................................................. 72
Bit 6—LOS Interrupt Status .......................................................................................................................... 72
Bit 5—AIS Interrupt Status ........................................................................................................................... 72
Bit 4—Idle Interrupt Status ........................................................................................................................... 72
Bit 3—FERF Interrupt Status ........................................................................................................................ 72
Bit 2—(Change in) AIC Interrupt Status ...................................................................................................... 73
Bit 1—OOF (Receive DS3 Framer) Interrupt Status ................................................................................... 73
Bit 0—P-Bit Error (Receive DS3 Framer) Interrupt Status ......................................................................... 73