
subject
:
date:
from:
Significant Changes to the DSP16210 Digital Signal Processor Data Sheet Since January 1999
Page(s)
20
Change
The last paragraph on this page had stated that writing a 1 to a bit in the
ins
register resets the corre-
sponding interrupt source. This statement was not correct and has been modified.
The first paragraph on this page had stated that a separate vector, TRAP is provided for the pin trap. The
name of this vector is actually PTRAP
In
Table 18, MIOU
0,1
Command (mcmd
0,1
) Register
, the INPT_DS command was missing. It has
been added.
In
Table 21, MIOU Command Latencies
, the register read-write latencies for the
morp
0,1
and
miwp
0,1
registers were removed. This is because these latencies are now automatically compensated
by the DSP16000 assembler. This is explained in
Peripheral Register Write-Read Latency
.
In
Table 34, Overall Replacement Table
, definitions for the new symbols aDEE, aSEE, and aTEE were
added. This agrees with the symbols in
Table 32, Instruction Set Summary
,
Table 36, F1E Function State-
ment Syntax
, and with the DSP16000 Digital Signal Processor Core nformation Manual.
The description of the
alf
register was expanded.
In
Table 81, Command Encoding for Boot Routines
, the following changes were made:
The command code 0x98 was added.
Corrections were made to entries in the PODS/PDS column for command codes 0x12, 0x52, 0x13, 0x53,
0x14, and 0x54.
A correction was made to the description for command code 0x15. Also, the following command codes
were added: 0x55, 0x95, and 0xD5.
24
44
48
,
86
78
91
127
130
131