參數(shù)資料
型號： DSP16210
英文描述： TVS 400W 6.5V UNIDIRECT SMA
中文描述： DSP16210數(shù)字信號處理器
文件頁數(shù)： 114/173頁
文件大?。?/td> 2621K
代理商： DSP16210
Data Sheet
July 2000
DSP16210 Digital Signal Processor
114
DRAFT COPY
Lucent Technologies Inc.
Software Architecture
(continued)
Registers
(continued)
Reset States
(continued)
Table 77. Core Register States After Reset—16-bit Registers
Register
Bits 15—0
alf
0000 00
ar0
ar1
ar2
ar3
auc0
0000 0000 0000 0000
auc1
0000 0000 0000 0000
c0
Table 78. Peripheral (Off-Core) Register States After Reset
Register
Size
(bits)
cbit
16
IBAS
0—1
10
ICR
16
0000 0000 0000 0000
ICSB
0—7
16
0000 0000 0000 0000
ICSL
0—1
16
0000 0000 0000 0000
ICVV
16
0000 0000 0000 0000
IDMX
0—15
16
ILEN
0—1
12
1111 1111 1111
ILIM
0—1
10
ioc
16
0000 0000 0000 0000
mcmd
0—1
16
miwp
0—1
16
00 0000 0000
morp
0—1
16
00 0000 0000
mwait
16
0000 1111 1111 1111
OBAS
0—1
10
OCR
16
0000 0000 0000 0000
OCSB
0—7
16
0000 0000 0000 0000
jiob
§
32
Note:
Upon exiting the boot code, the following core registers are not reinitialized to their reset states as defined in
the DSP16000 Digital Signal Processor Core nformation Manual:
inc0
,
rb0
,
re0
,
vbase
,
cloop
,
cstate
. With
the exception of the
ioc
register, none of the peripheral registers are reinitialized to their reset states as
defined in
Table 78
. It is recommended that the user code immediately globally disable interrupts by execut-
ing a
di
instruction and clear all pending interrupts by clearing
ins
(
ins = 0xfffff
).
Register
c1
c2
cloop
cstate
psw0
psw1
vsw
Bits 15—0
0000 0000 0000 0000
0000 0000 0000 0000
00
0000
0000 0000 0000 0000
Bits 15—0
Register
Size
(bits)
16
16
11
10
16
16
16
12
16
16
8
16
16
16
12
16
16
Bits 15—0
OCSL
0—1
OCVV
OLEN
0—1
OLIM
0—1
OMX
0—15
PDX
(in)
PDX
(out)
PHIFC
pllc
powerc
PSTAT
sbit
SSDX
(in)
SSDX
(out)
SSIOC
timer
0—1
timer
0—1
c
0000 0000 0000 0000
0000 0000 0000 0000
000 0000 0000
0000 0000 0000 0000
0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
01
0000 0000 PPPP PPPP
0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
The value of
sbit
[7:0] is the same as that of the pins IOBIT[7:0].
Unlike the DSP1620, there is no external means (e.g., INT1 and EXM) to initialize
mwait
to any other value.
§ The
jiob
register is the only peripheral register that is 32 bits; therefore, the bit pattern shown is for bits 31—0.
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