參數(shù)資料
型號： DSP16210
英文描述： TVS 400W 6.5V UNIDIRECT SMA
中文描述： DSP16210數(shù)字信號處理器
文件頁數(shù)： 133/173頁
文件大?。?/td> 2621K
代理商： DSP16210
Data Sheet
July 2000
DSP16210 Digital Signal Processor
Lucent Technologies Inc.
DRAFT COPY
133
Device Characteristics
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are abso-
lute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess
of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended
periods can adversely affect device reliability.
External leads can be bonded and soldered safely at temperatures of up to 300
°
C.
Handling Precautions
All MOS devices must be handled with certain precautions to avoid damage due to the accumulation of static
charge. Although input protection circuitry has been incorporated into the devices to minimize the effect of this
static buildup, proper precautions should be taken to avoid exposure to electrostatic discharge during handling and
mounting. Lucent Technologies employs a human-body model for ESD-susceptibility testing. Since the failure volt-
age of electronic devices is dependent on the current, voltage, and hence, the resistance and capacitance, it is
important that standard values be employed to establish a reference by which to compare test data. Values of
100 pF and 1500
are the most common and are the values used in the Lucent Technologies human-body model
test circuit. The breakdown voltage for the DSP16210 is greater than 2000 V.
Recommended Operating Conditions
The ratio of the instruction cycle rate to the input clock frequency is 1:1 without the PLL and M/2N with the PLL
selected (see
Clock Synthesis beginning on page 56
).
The maximum input clock (CKI pin) frequency is
50 MHz. The PLL must be used when an internal clock frequency greater than 50 MHz is required.
Table 82. Absolute Maximum Ratings
Parameter
Min
–0.5
Max
+4.6
Unit
V
V
W
°
C
°
C
Voltage Range on V
DD
or V
DDA
with Respect to Ground
Voltage Range on Any Signal Pin
Power Dissipation
Junction Temperature (T
J
)
Storage Temperature Range
V
SS
– 0.5
—
–40
–65
V
DD
+ 0.5
1
+125
+150
Table 83. Recommended Operating Conditions
Maximum
Internal Clock
(CLK) Frequency
100 MHz
Minimum
Internal Clock
(CLK) Period T
10 ns
Package
Supply Voltage
V
DD
(V)
Min
3.0
Ambient Temperature T
A
(
°
C)
Max
3.6
Min
–40
Max
85
TQFP
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