參數(shù)資料
型號: DSP16210
英文描述: TVS 400W 6.5V UNIDIRECT SMA
中文描述: DSP16210數(shù)字信號處理器
文件頁數(shù): 120/173頁
文件大?。?/td> 2621K
代理商: DSP16210
Data Sheet
July 2000
DSP16210 Digital Signal Processor
120
DRAFT COPY
Lucent Technologies Inc.
Pin Information
(continued)
2, 17, 21, 54,
55, 66, 78, 86,
92, 98, 121,
123, 143
During and after reset, the internal clock is selected as the CKI input pin and the CKO output pin is selected as the internal clock.
This pin his internal pull-up circuitry.
§
3-states by JTAG control.
The
ioc
register (see
Table 54 on page 99
) is cleared after reset, including its EBIO field that controls the multiplexing of the VEC0/IOBIT7,
VEC1/IOBIT6, VDC2/IOBIT5, and VEC3/IOBIT4 pins. After reset, these pins are configured as the VEC[3:0] outputs and are logic high.
If unused, this pin must be pulled low through a 10 k
resistor to V
SS
.
§§ 3-states if RSTB = 0 or
PHIFC
[PCFIG] = 0.
NU
— Not Usable (No external con-
nections are allowed.)
Table 80. Pin Descriptions
(continued)
TQFP Pin
Symbol
Type
Name/Function
Pin State During Reset
(RSTB = 0)
Pin State After
Reset
(RSTB 0
1)
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