
MOTOROLA
Chapter 2. Programming Model
2-15
2.3 Instruction Set Summary
This section describes instructions and addressing modes defined for the 603e. These
instructions are divided into the following functional categories:
Integer instructions—These include arithmetic and logical instructions. For more
information, see Section 2.3.4.1, “Integer Instructions.”
Floating-point instructions—These include floating-point arithmetic instructions, as
well as instructions that affect the floating-point status and control register (FPSCR).
For more information, see Section 2.3.4.2, “Floating-Point Instructions.” (Note that
floating-point operations are not supported on the EC603e microprocessor)
Load and store instructions—These include integer and floating-point load and store
instructions. For more information, see Section 2.3.4.3, “Load and Store
Instructions.”
Flow control instructions—These include branching instructions, condition register
logical instructions, and other instructions that affect the instruction flow. For more
information, see Section 2.3.4.4, “Branch and Flow Control Instructions.”
Trap instructions—These instructions are used to test for a specified set of
conditions; see Section 2.3.4.5, “Trap Instructions,” for more information.
Processor control instructions—These instructions are used for synchronizing
memory accesses and managing caches, TLBs, and segment registers. For more
information, see Sections 2.3.4.6, 2.3.5.1, and 2.3.6.2.
Memory synchronization instructions—These instructions are used for memory
synchronizing. See Sections 2.3.4.7 and Section 2.3.5.2 for more information.
Memory control instructions—These instructions provide control of caches, TLBs,
and segment registers. For more information, see Sections 2.3.5.3 and 2.3.6.3.
System linkage instructions—For more information, see Section 2.3.6.1, “System
Linkage Instructions.”
External control instructions—These include instructions for use with special input/
output devices. For more information, see Section 2.3.5.4, “External Control
Instructions.”
Note that this grouping of instructions does not necessarily indicate the execution unit that
processes a particular instruction or group of instructions. This information, which is useful
in taking full advantage of the 603e’s superscalar parallel instruction execution, is provided
in Chapter 8, “Instruction Set,” in
The Programming Environments Manual
.
Integer instructions operate on word operands. Floating-point instructions operate on
single-precision and double-precision floating-point operands. The PowerPC architecture
uses instructions that are four bytes long and word-aligned. It provides for byte, half-word,
and word operand loads and stores between memory and a set of 32 general-purpose
registers (GPRs). It also provides for word and double-word operand loads and stores
between memory and a set of 32 floating-point registers (FPRs).