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MPC603e & EC603e RISC Microprocessors User's Manual
MOTOROLA
completed. The FPSCR instructions are listed in Table 2-18. (Floating-point instructions
are not supported on the EC603e microprocessor.)
Implementation Note
—The architecture notes that, in some implementations, the Move
to FPSCR Fields (
mtfsf
x
) instruction may perform more slowly when only a portion of the
fields are updated as opposed to all of the fields. This is not the case in the 603e.
2.3.4.2.6 Floating-Point Move Instructions
Floating-point move instructions copy data from one floating-point register to another. The
floating-point move instructions do not modify the FPSCR. The CR update option in these
instructions controls the placing of result status into CR1. Floating-point move instructions
are listed in Table 2-18. (Floating-point instructions are not supported on the EC603e
microprocessor.)
2.3.4.3 Load and Store Instructions
Load and store instructions are issued and translated in program order; however, the
accesses can occur out of order. Synchronizing instructions are provided to enforce strict
ordering. This section describes the load and store instructions of the 603e, which consist
of the following:
Integer load instructions
Integer store instructions
Integer load and store with byte-reverse instructions
Integer load and store multiple instructions
Table 2-18. Floating-Point Status and Control Register Instructions
Name
Mnemonic
Operand Syntax
Move from FPSCR
mffs (mffs.)
fr
D
Move to Condition Register
from FPSCR
mcrfs
crf
D
,crf
S
Move to FPSCR Field Immediate
mtfsfi (mtfsfi.)
crf
D
,
IMM
Move to FPSCR Fields
mtfsf (mtfsf.)
FM
,fr
B
Move to FPSCR Bit 0
mtfsb0 (mtfsb0.)
crb
D
Move to FPSCR Bit 1
mtfsb1 (mtfsb1.)
crb
D
Table 2-19. Floating-Point Move Instructions
Name
Mnemonic
Operand Syntax
Floating Move Register
fmr (fmr.)
fr
D
,fr
B
Floating Negate
fneg (fneg.)
fr
D
,fr
B
Floating Absolute Value
fabs (fabs.)
fr
D
,fr
B
Floating Negative Absolute Value
fnabs (fnabs.)
fr
D
,fr
B