
xiv
MPC603e & EC603e RISC Microprocessors User's Manual
MOTOROLA
CONTENTS
Paragraph
Number
Title
Page
Number
8.4.4.1
8.4.4.2
8.4.5
8.5
8.6
8.6.1
8.6.2
8.6.3
8.7
8.7.1
8.7.2
8.7.3
8.7.4
8.8
8.8.1
8.8.2
8.9
8.9.1
8.10
Normal Single-Beat Termination...............................................................8-26
Data Transfer Termination Due to a Bus Error..........................................8-29
Memory Coherency—MEI Protocol..............................................................8-30
Timing Examples................................................................................................8-32
Optional Bus Configurations..............................................................................8-38
32-Bit Data Bus Mode....................................................................................8-38
No-
DRTRY
Mode..........................................................................................8-40
Reduced-Pinout Mode....................................................................................8-40
Interrupt, Checkstop, and Reset Signals.............................................................8-41
External Interrupts..........................................................................................8-41
Checkstops......................................................................................................8-41
Reset Inputs....................................................................................................8-41
System Quiesce Control Signals ....................................................................8-42
Processor State Signals.......................................................................................8-42
Support for the
lwarx/stwcx.
Instruction Pair................................................8-42
TLBISYNC
Input...........................................................................................8-42
IEEE 1149.1-Compliant Interface......................................................................8-43
IEEE 1149.1 Interface Description.................................................................8-43
Using Data Bus Write Only................................................................................8-43
Chapter 9
Power Management
9.1
9.2
9.2.1
9.2.1.1
9.2.1.2
9.2.1.3
9.2.1.4
9.2.1.5
9.2.2
Dynamic Power Management ..............................................................................9-1
Programmable Power Modes................................................................................9-1
Power Management Modes..............................................................................9-3
Full-Power Mode with DPM Disabled.........................................................9-3
Full-Power Mode with DPM Enabled..........................................................9-3
Doze Mode...................................................................................................9-4
Nap Mode.....................................................................................................9-4
Sleep Mode...................................................................................................9-5
Power Management Software Considerations..................................................9-6
Appendix A
PowerPC Instruction Set Listings
A.1
A.2
A.3
A.4
A.5
Instructions Sorted by Mnemonic........................................................................A-1
Instructions Sorted by Opcode ............................................................................A-9
Instructions Grouped by Functional Categories................................................A-17
Instructions Sorted by Form..............................................................................A-28
Instruction Set Legend.......................................................................................A-39