
MOTOROLA
Chapter 1. Overview
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1.3.2 Instruction Set and Addressing Modes
The following subsections describe the PowerPC instruction set and addressing modes in
general.
1.3.2.1 PowerPC Instruction Set and Addressing Modes
All PowerPC instructions are encoded as single-word (32-bit) opcodes. Instruction formats
are consistent among all instruction types, permitting efficient decoding to occur in parallel
with operand accesses. This fixed instruction length and consistent format greatly simplifies
instruction pipelining.
1.3.2.1.1 PowerPC Instruction Set
The PowerPC instructions are divided into the following categories:
Integer instructions—These include computational and logical instructions.
— Integer arithmetic instructions
— Integer compare instructions
— Integer logical instructions
— Integer rotate and shift instructions
Floating-point instructions—These include floating-point computational
instructions, as well as instructions that affect the FPSCR. (Note that these
instructions are not implemented on the EC603e microprocessor.)
— Floating-point arithmetic instructions
— Floating-point multiply/add instructions
— Floating-point rounding and conversion instructions
— Floating-point compare instructions
— Floating-point status and control instructions
Load/store instructions—These include integer and floating-point load and store
instructions.
— Integer load and store instructions
— Integer load and store multiple instructions
— Floating-point load and store (not implemented on the EC603e microprocessor)
— Primitives used to construct atomic memory operations (
lwarx
and
stwcx.
instructions)
Flow control instructions—These include branching instructions, condition register
logical instructions, trap instructions, and other instructions that affect the
instruction flow.
— Branch and trap instructions
— Condition register logical instructions