
MOTOROLA
Chapter 2. Programming Model
2-23
signed for the
cmpi
and
cmp
instructions, and unsigned for the
cmpli
and
cmpl
instructions. Table 2-10 lists the integer compare instructions.
The
crf
D operand can be omitted if the result of the comparison is to be placed in CR0.
Otherwise the target CR field must be specified in the instruction
crf
D field.
For more information refer to Appendix F, “Simplified Mnemonics,” in
The Programming
Environments Manual
.
2.3.4.1.3 Integer Logical Instructions
The logical instructions shown in Table 2-11 perform bit-parallel operations. Logical
instructions with the CR update enabled and instructions
andi.
and
andis.
set CR field CR0
to characterize the result of the logical operation. These fields are set as if the sign-extended
low-order 32 bits of the result were algebraically compared to zero. Logical instructions
without CR update and the remaining logical instructions do not modify the CR. Logical
instructions do not affect the XER[SO], XER[OV], and XER[CA] bits.
For simplified mnemonics examples for the integer logical operations see Appendix F,
“Simplified Mnemonics,” in
The Programming Environments Manual
.
Table 2-10. Integer Compare Instructions
Name
Mnemonic
Operand Syntax
Compare Immediate
cmpi
crf
D
,
L
,r
A
,
SIMM
Compare
cmp
crf
D
,
L
,r
A
,r
B
Compare Logical Immediate
cmpli
crf
D
,
L
,r
A
,
UIMM
Compare Logical
cmpl
crf
D
,
L
,r
A
,r
B
Table 2-11. Integer Logical Instructions
Name
Mnemonic
Operand Syntax
AND Immediate
andi.
r
A
,r
S
,
UIMM
AND Immediate Shifted
andis.
r
A
,r
S
,
UIMM
OR Immediate
ori
r
A
,r
S
,
UIMM
OR Immediate Shifted
oris
r
A
,r
S
,
UIMM
XOR Immediate
xori
r
A
,r
S
,
UIMM
XOR Immediate Shifted
xoris
r
A
,r
S
,
UIMM
AND
and (and.)
r
A
,r
S
,r
B
OR
or (or.)
r
A
,r
S
,r
B
XOR
xor (xor.)
r
A
,r
S
,r
B
NAND
nand (nand.)
r
A
,r
S
,r
B
NOR
nor (nor.)
r
A
,r
S
,r
B