
MOTOROLA
Contents
ix
CONTENTS
Paragraph
Number
Title
Page
Number
4.5.6.1
4.5.6.1.1
4.5.6.2
4.5.7
4.5.7.1
4.5.7.2
Integer Alignment Exceptions ...................................................................4-27
Page Address Translation Access..........................................................4-28
Floating-Point Alignment Exceptions........................................................4-28
Program Exception (0x00700).......................................................................4-29
IEEE Floating-Point Exception Program Exceptions................................4-30
Illegal, Reserved, and Unimplemented Instructions
Program Exceptions...............................................................................4-30
Floating-Point Unavailable Exception (0x00800) .........................................4-31
Decrementer Exception (0x00900)................................................................4-31
System Call Exception (0x00C00).................................................................4-31
Trace Exception (0x00D00)...........................................................................4-32
Single-Step Instruction Trace Mode..........................................................4-33
Branch Trace Mode....................................................................................4-33
Instruction TLB Miss Exception (0x01000)..................................................4-33
Data TLB Miss on Load Exception (0x01100)..............................................4-34
Data TLB Miss on Store Exception (0x01200)..............................................4-35
Instruction Address Breakpoint Exception (0x01300)...................................4-35
System Management Interrupt (0x01400) .....................................................4-37
4.5.8
4.5.9
4.5.10
4.5.11
4.5.11.1
4.5.11.2
4.5.12
4.5.13
4.5.14
4.5.15
4.5.16
Chapter 5
Memory Management
5.1
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
5.1.6
5.1.6.1
5.1.6.2
5.1.7
5.1.8
5.2
5.3
5.4
5.4.1
5.4.1.1
5.4.1.2
5.4.1.3
5.4.2
5.4.3
MMU Features.....................................................................................................5-2
Memory Addressing.........................................................................................5-3
MMU Organization..........................................................................................5-3
Address Translation Mechanisms....................................................................5-8
Memory Protection Facilities.........................................................................5-10
Page History Information...............................................................................5-11
General Flow of MMU Address Translation.................................................5-11
Real Addressing Mode and Block Address Translation Selection............5-11
Page Address Translation Selection...........................................................5-12
MMU Exceptions Summary ..........................................................................5-14
MMU Instructions and Register Summary....................................................5-17
Real Addressing Mode.......................................................................................5-20
Block Address Translation.................................................................................5-20
Memory Segment Model....................................................................................5-21
Page History Recording .................................................................................5-21
Referenced Bit............................................................................................5-22
Changed Bit................................................................................................5-23
Scenarios for Referenced and Changed Bit Recording..............................5-23
Page Memory Protection................................................................................5-25
TLB Description.............................................................................................5-25