
PC/AT Peripheral Registers
3-1
CHAPTER
3
PC/AT PERIPHERAL REGISTERS
The élanSC310 microcontroller contains internal registers used to display the status of
various élanSC310 microcontroller internal states, to serve as the target for software
commands, to act as data paths to external peripherals, and to access other registers.
All élanSC310 microcontroller registers have an address. A small number of registers
have explicit I/O addresses—that is, their location is fixed in the I/O address space of the
Am386SXLV processor. However, most of the registers are addressed via an indirect
addressing scheme in which a few registers with actual I/O addresses are used to point to
the others. This system is explained below in the sections where it is relevant.
This chapter only describes the peripheral registers; the configuration registers are
described in the following chapter. For purposes of this manual, the élanSC310 micro-
controller’s register set is divided into two groups:
I
Core AT-compatible peripheral registers (and miscellaneous AT-compatible registers)
I
Configuration registers
Registers in the first group have explicit I/O addresses, and are directly addressed in I/O
space. Registers in the second group are addressed indirectly, and have an index value
instead of an I/O address.
Notes:
1. When using a logic analyzer to probe the address, data, and control lines of the
élanSC310 microcontroller, accesses to the internal registers can be captured, with
the exception of reads from even addresses. However, when internal registers are
accessed, DBUFOE is not asserted.
2. In general, the élanSC310 microcontroller’s cores decode only up to address bit A9 for
I/O accesses. What this means is that the I/O address space is mirrored every
400h bytes. Care should be taken when assigning peripherals I/O addresses above
3FFh so that conflicts with the mirrored I/O registers are avoided.