
Configuration Registers
4-31
4.3.32
MMS Address Extension 1 Register (Index 6Ch)
This is the MMS register that contains address-extension bit 23 for all pages.
Bits 3–0
(pages 0–3). Before programming this register, software must select the region to
program (i.e., MMSA or MMSB). This selection is performed via bit 1 of the MMSB
Control register at Index 74h.
Provide mapped address-extension bit 23 for both MMSA and MMSB
4.3.33
MMS Address Register (Index 6Dh)
This register selects the base I/O addresses and page addresses.
Bits 3–0
and MMSB (pages 0–3). These page registers get mapped at different I/O locations as
listed in Table 4-24 on page 4-32. Once the I/O address spaces for these registers are
programmed, writes to these address spaces store mapped address-extension
bits 20–14 for the windows in MMSA and MMSB as indicated in Table 4-25 on page 4-32.
Provide selection of page-register I/O addresses for both MMSA (pages 0–7)
7
0
Bit
Default
E7A23
0
E6A23
0
E5A23
0
E4A23
0
E3A23
0
E2A23
0
E1A23
0
E0A23
0
Bit
Name
R/W
Function
7
6
5
4
3
2
1
0
E7A23
E6A23
E5A23
E4A23
E3A23
E2A23
E1A23
E0A23
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MMSA page 7 address extension bit 23
MMSA page 6 address extension bit 23
MMSA page 5 address extension bit 23
MMSA page 4 address extension bit 23
MMSA/MMSB page 3 address extension bit 23
MMSA/MMSB page 2 address extension bit 23
MMSA/MMSB page 1 address extension bit 23
MMSA/MMSB page 0 address extension bit 23
7
0
Field
Bit
Default
Base Address
EMBA2
0
Page Address
EMIO2
0
EMBA3
0
EMBA1
0
EMBA0
0
EMIO3
0
EMIO1
0
EMIO0
0
Bit
Name
R/W
Function
7
6
5
4
3
2
1
0
EMBA3
EMBA2
EMBA1
EMBA0
EMIO3
EMIO2
EMIO1
EMIO0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MMSA base address, bit 3
MMSA base address, bit 2
MMSA base address, bit 1
MMSA base address, bit 0
MMSA/B page register(s) I/O address, bit 3
MMSA/B page register(s) I/O address, bit 2
MMSA/B page register(s) I/O address, bit 1
MMSA/B page register(s) I/O address, bit 0