
I-14
INDEX
Port 92 (Port 092h),
3-21
Port B Register (Port 061h),
3-20
probing address data with logic analyzer (note),
3-1
Programmable Interval Timer Registers,
3-4
real-time clock
addressing,
3-16
overview,
3-16
Register A (RTC Index 0Ah),
3-17
–
3-18
Register B (RTC Index 0Bh),
3-19
Register C (RTC Index 0Ch),
3-19
Register D (RTC Index 0Dh),
3-19
RTC register summary (table),
3-17
RTC Index Data Register (Port 071h),
3-21
System Timer Registers (table),
3-5
PE bit
Line Control Register (Ports 2FBh & 3FBh),
3-13
Line Status Register (Ports 2FDh & 3FDh),
3-14
Parallel Status Port (Ports 279h & 379h),
3-10
Parallel Status Port (Ports 279h, 379h, & 3BDh),
3-9
periodic-interrupt rate-selection bits (table),
3-18
peripheral-device
1-11
–
1-13
PIO timeout settings (table),
1-12
power-management control pin settings (table),
1-12
SMI-generation settings for PIO access (table),
1-13
power
programming
example,
PF bit,
3-19
PFWS bit
DRAM first cycle wait state select logic (table),
4-25
ROM Configuration 1 Register (Index 65h),
4-27
PG0IN bit,
4-54
PG0IO0 bit,
4-48
PG0IO1 bit,
4-48
PG1IN bit,
4-55
PG1IO0 bit,
4-48
PG1IO1 bit,
4-48
PG2IO0 bit,
4-48
PG2IO1 bit,
4-48
PG3IO0 bit,
4-48
PG3IO1 bit,
4-48
PGP pins, controlling
General-Purpose I/O 1 Register (Index 9Ch),
4-51
General-Purpose I/O 2 Register (Index 94h),
1-7
,
4-49
General-Purpose I/O 3 Register (Index 95h),
1-7
,
4-49
General-Purpose I/O Control Register (Index 91h),
1-7
,
4-47
–
4-48
General-Purpose I/O Register (Index 89h),
4-46
registers for setting up (table),
4-8
PGP0DIR bit,
4-35
PGP1DIR bit,
4-39
PGP2 pin,
1-15
PGP3 pin,
1-15
PIE bit,
3-19
PIND0 bit,
4-55
PIND1 bit,
4-55
PIND2 bit,
4-55
PIO Address Register (Index 45h)
bit descriptions,
4-15
powered-down device SMIs,
1-29
PIO timeout settings example (table),
1-12
PIO Timer Register (Index 46h)
address range decode logic (table),
4-17
bit descriptions,
4-16
powered-down device SMIs,
1-29
setting logic (table),
4-16
PIO0 bit
Activity Mask 2 Register (Index 76h),
4-41
Activity Status 2 Register (Index A1h),
4-53
PIO1 bit
Activity Mask 2 Register (Index 76h),
4-41
Activity Status 2 Register (Index A1h),
4-53
PIOSMI bit,
4-14
PIOT0 bit,
4-16
PIOT1 bit,
4-16
PIOT2 bit,
4-16
PIOT3 bit,
4-16
PIOTOLTCH bit,
4-12
PIRQ Configuration Register (Index B2h)
bit descriptions,
4-64
interrupt redirect logic (table),
4-65
PMC pins
PIO timeout settings example (table),
1-12