
Memory Management
2-7
In order to speed up BIOS accesses, many PC systems copy the ROM-BIOS contents
into on-board DRAM at startup. Then the system is set to send ROM-BIOS accesses to
the DRAM instead of the ROM. This technique is called
ROM shadowing
.
The usual implementation is to copy the BIOS image stored in ROM to the same
addresses in system RAM, and then transfer program control to the BIOS image in sys-
tem RAM (see Figure 2-4 on page 2-7).
For example, to shadow ROM to RAM in a system where the BIOS ROM is a 128-Kbyte
section located from 0E0000h to 0FFFFFh in CPU address space, the following algorithm
can be implemented:
1. Copy the ROM-based image into a 128-Kbyte buffer in conventional RAM.
2. Jump to the exact same place in the conventional RAM-based BIOS image that was
being executed in the ROM-based BIOS image.
3. Enable the élanSC310 microcontroller’s shadow-RAM function and disable the
shadow RAM’s write-protect feature by setting bits 4 and 7 of the ROM Configuration 1
register at Index 65h.
4. Set the shadow-RAM address range to match the BIOS ROM’s range of 0E0000h to
0FFFFFh by writing FFh to the Shadow RAM Enable 2 register at Index 69h.
5. Disable ROMCS for the range 0E0000–0FFFFFh by setting bit 0 and clearing bit 1 of
the ROM Configuration 1 register.
6. Copy the conventional RAM-based BIOS image to shadow RAM from 0E0000h to
0FFFFFh. Once this is done, shadow RAM may optionally be write protected by clear-
ing bit 7 of the ROM Configuration 1 register.
7. Jump to the same place in the shadow-RAM-based BIOS image that was being exe-
cuted in the conventional RAM-based BIOS image.
Note:
Configuration 1 register. Bit 0 reads the inverse of what was last written; therefore, it must
be flipped again prior to write-back to keep ROMCS settings unchanged.
Use caution when performing read-modify-write sequences of the ROM
Figure 2-4
Copying ROM Contents
16 Mbyte
16 Mbyte
System
Memory
ROM-
BIOS
Memory
0FFFFFh
0E0000h
0FFFFFh
0E0000h
0
0
Copy
Copy