
4-42
Configuration Registers
4.3.43
Control B Register (Index 77h)
This register controls various general functions.
Bit 6
Configuration register at Index B2h so it does not conflict with the IRQ selection for the
internal UART.
If the élanSC310 microcontroller is in Local Bus mode, program the PIRQ
Bit 3
puts the CPU clock into High-Speed PLL mode. Otherwise, the CPU clock is always
operating at the low-speed PLL frequency. This function is not dependent on any activity
(see “Auto Low-Speed Control Register (Index 9Fh)” on page 4-51).
This bit is only useful if bit 6 of the I/O Wait State register at Index 61h is 1, which
4.3.44
Reserved Registers (Indexes 78–7Fh)
These index locations are reserved.
4.3.45
Power Control 1 Register (Index 80h)
This register controls the PMC2 output pin in High-Speed PLL mode, Low-Speed PLL
mode, and Doze mode. It also enables/disables the low-speed PLL and video PLL in
Doze mode.
7
0
Bit
Default
UART_IR4
0
UART_IR3
0
UART_IOP
0
UART_EN
0
AUTLOW
0
(Reserved)
0
0
0
Bit
Name
R/W
Function
7
6
5
UART_IR4
UART_IR3
UART_IOP
R/W
R/W
R/W
Set internal UART IRQ to IRQ4
Set internal UART IRQ to IRQ3
0 = Set internal UART I/O address to 3F8–3FFh
1 = Set internal UART I/O address to 2F8–2FFh
1 = Enable internal UART
1 = Enable Auto Low-Speed
(Reserved)
4
3
2–0
UART_EN
AUTLOW
R/W
R/W
R/W
7
0
Bit
Default
0CLK_DOZ
0
DZ2
0
(Reserved)
0
FO2
0
(Reserved)
0
0
0
0
Bit
Name
R/W
Function
7
6
5–4
3
2
1–0
Note:
The state of PMC2 after power-on is Low. When the bit is 0, the corresponding PMC output is Low. For details,
see Chapter 1, “Power Management.”
0CLK_DOZ
DZ2
R/W
R/W
R/W
R/W
R/W
R/W
1 = Low-speed PLL and video PLL are shut down in Doze mode
1 = State of PMC2 pin in Doze mode
(Reserved)
(Reserved—must be 0)
1 = State of PMC2 pin in High-Speed PLL and Low-Speed PLL modes
(Reserved)
FO2