
1-14
Power Management
1.2
EXTERNAL-DEVICE CONTROL INTERFACE
The external-device control interface includes the following pins:
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Power-Management Control (PMC4–PMC0)
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Programmable General-Purpose (PGP3–PGP2)
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Latched Power (LPH)
Power-Management Control Pins
The Power-Management Control (PMC4–PMC0) pins may be used for either or both of
the following purposes:
1.2.1
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General-purpose control of external devices in conjunction with the PMU state
machine
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Timer-controlled shutdown of a floppy disk drive (addresses 3F0–3F7h), hard disk
drive (addresses 1F0–1F7h), or user-specified I/O device in conjunction with the
élanSC310 microcontroller’s SMI interface.
1.2.1.1
General-Purpose Control Using the PMU State Machine
When using the PMC pins for general-purpose control, PMC4 and PMC2–PMC0 are non-
inverting and drive a 0 at reset. PMC3 is inverting and will drive a 1 at reset. Each pin may
be programmed to drive a unique state in High-Speed PLL, Low-Speed PLL, Doze,
Sleep, and Suspend modes. Pin state switching occurs on the next refresh cycle after a
PMU state change. The signals are not synchronous and may glitch when changing to
High-Speed PLL mode. Internal gray encoding prevents glitching when the PMU states
are cycling down sequentially from High-Speed PLL mode. Table 1-7 on page 1-14 sum-
marizes the functionality of these pins.
1.2.1.2
Timer-Controlled Shutdown Using the SMI Interface
When using PMC4 or PMC1–PMC0 for timer-controlled shutdown of devices, the SMI
timer logic must be enabled through the SMI Enable register at Index 41h. In addition, the
bits in the General-Purpose I/O 0–1 and 4 registers that correspond to the modes in
which the devices normally run should be programmed to 1. A PMC output pin goes High
to enable a device. The pin goes Low to disable a device under any of the following condi-
tions:
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The SMI device timer expires.
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The PMU enters Sleep, Suspend, or Off mode.
Table 1-7
PMC Pin Functionality
PMC Pin No.
Control Register
Output Sense
SMI Timer Function
0
Index ACh, bits 3–0
Noninverting
Floppy disk drive (3F0–3F7h)
1
Index ACh, bits 7–4
Noninverting
Programmable I/O address
2
Index 80h, bits 6 and 2
Index 81h, bits 6 and 2
Noninverting
(None)
3
Index ABh, bits 3–0
Inverting
(None)
4
Index ABh, bits 7–4
Noninverting
Hard disk drive (1F0–1F7h)