參數(shù)資料
型號: ARM966E-S
英文描述: ARM966E-S Microprocessor Core preliminary technical manual 6/01
中文描述: ARM966E - ?微處理器核的初步技術手冊6月1日
文件頁數(shù): 76/166頁
文件大?。?/td> 1145K
代理商: ARM966E-S
5-6
AHB Interface Unit
Rev. A
Copyright 1999-2001 by LSI Logic Corporation. All rights reserved.
5.2.3.2 HSIZE[2:0]
HSIZE[2:0] indicate the transfer size. The size is used in conjunction with
the HBURST[2:0] signals to determine the address boundary for
wrapping bursts. The ARM966E-S only supports transfer sizes of byte,
halfword, and word (HSIZE[2:0] = 0b000, 0b001, and 0b010).
5.2.3.3 HPROT[3:0]
HPROT[3:0] are the protection control signals. They provide additional
information about a bus access and are primarily intended for use by any
module that wishes to implement some level of protection.
HPROT0 indicates whether the instruction is an opcode fetch or data
access. HPROT1 indicates whether the transfer is a supervisor mode
access or user mode access. For bus masters with an MMU, HPROT2
indicates whether the current access is bufferable. HPROT3 is tied to 0,
indicating noncacheable.
Table 5.3
Size Encoding
HSIZE[2:0]
Transfer Size Description
000
8 bits
Byte
001
16 bits
Halfword
010
32 bits
Word
011–111
Not supported
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