參數(shù)資料
型號(hào): ARM966E-S
英文描述: ARM966E-S Microprocessor Core preliminary technical manual 6/01
中文描述: ARM966E - ?微處理器核的初步技術(shù)手冊(cè)6月1日
文件頁數(shù): 36/166頁
文件大?。?/td> 1145K
代理商: ARM966E-S
2-16
Signal Descriptions
Rev. A
Copyright 1999-2001 by LSI Logic Corporation. All rights reserved.
DBGTAPSM[3:0]
TAP Controller State Machine
This bus reflects the current state of the TAP controller
state machine. The TAP controller follows the
IEEE 1149.1 Test Access Port protocol.
Output
DBGTCKEN
Test Clock Enable
This input is the synchronous enable for the test clock.
Input
DBGTDI
Test Data In
DBGTDI contains data input from the boundary scan
logic.
Input
DBGTDO
Test Data Out
The ARM966E-S outputs test data on DBGTDO from its
boundary scan logic.
Output
DBGTMS
Test Mode Select
DBGTMS is the JTAG test mode select signal. The test
mode follows the IEEE 1149.1 Test Access Port protocol.
Input
EDBGRQ
External Debug Request
An external debugger asserts this signal to force the
processor to enter the debug state.
Input
2.7 ETM Interface Signals
These signals are part of the Trace module interface. All ETM outputs
are registered from the corresponding core internal signals.
ETMBIGEND
Endian Mode
When this signal is HIGH, the endian mode is big endian;
when ETMBIGEND is LOW, the mode is little endian.
Output
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